后仿真时序问题求解

小弟在做后仿真的时候,用PT时序分析布局布线的网表sigma.v,我用encounter读出了好几种延时文件的格式,sigma.spef,sigma.sdf.sigma.spf.但当我用PT读入这些文件时都会报错,请问这是什么原因呢? 我的库显示连接成功了.
请问这是什么原因呢?求大师指点一下,多谢了
pt_shell> read_sdf sigma_encounter.sdf
Warning: The SDF file is version 3.0. Current SDF-3.0
supported constructs are: REMOVAL, RECREM, RETAIN and CONDELSE. (SDF-026)
Error: Cannot find pin 'u1/b0_reg/Q' in design 'sigma' (DES-002)
Error: Cannot find pin 'u1/U25/CI' in design 'sigma' (DES-002)
Error: Cannot find pin 'u1/b1_reg/Q' in design 'sigma' (DES-002)
Error: Cannot find pin 'u1/U24/CI' in design 'sigma' (DES-002)
Error: Cannot find pin 'u1/b2_reg/Q' in design 'sigma' (DES-002)
..
..
Note - message 'DES-002' default limit (100) exceeded.Remainder will be suppressed.
Error: Cannot find instance 'u1/b0_reg'. All delays related to that instance are ignored. (SDF-011)
Error: Cannot find instance 'u1/b1_reg'. All delays related to that instance are ignored. (SDF-011)
Error: Cannot find instance 'u1/b2_reg'. All delays related to that instance are ignored. (SDF-011)
Error: Cannot find instance 'u1/b3_reg'. All delays related to that instance are ignored. (SDF-011)
Error: Cannot find instance 'u1/b4_reg'. All delays related to that instance are ignored. (SDF-011)
Error: Cannot find instance 'u1/U20'. All delays related to that instance are ignored. (SDF-011)
Error: Cannot find instance 'u1/U25'. All delays related to that instance are ignored. (SDF-011)
Error: Cannot find instance 'u1/U24'. All delays related to that instance are ignored. (SDF-011)
Error: Cannot find instance 'u1/U23'. All delays related to that instance are ignored. (SDF-011)
Error: Cannot find instance 'u1/U22'. All delays related to that instance are ignored. (SDF-01

PT读入网表后，先不要读入spef和sdf
用get_pins u1/b0_reg/Q看看是否找得到

你好,我又重新导入了网表,①read_verilog sigma_pre.v成功②link_design sigma成功
③get_pins u1/b0_reg/Q成功
单独只读入网表的话,能找到 u1/b0_reg/Q.
貌似之前报错只是在读入sigma.sdf文件时才报,是不是说明,sdf文件中没有例化单元?
我接下来该如何做呢?

看看sdf头部 hierarchy divider是怎么定义的，正确的应该是/

嗯..多谢小编关注,我的搞定了.我刚才又试了一下,.sdf...spef文件都能成功读进去了.成功反标了..有劳小编费心了

问题出在哪里?

我也不知道,问你之前我试过用同样的步骤进行时序分析,但在读.sdf文件时它就会报错:说sdf文件中没找到pin,没找到例化单元..但我听你的指示在读入.sdf文件前用gets pin命令后,一切都正常了.反标成功了.............我也很无语,不知道怎么回事.


小编,我还有个问题想请教一下,,我的这个设计做完布局布线后的时序分析之后,有很多hold时序违例,我知道要重新布局布线,但我不知道在重新布局布线中该注意哪些问题,哪些方面去消除布线后的hold时序违例........请小编再指点一下.多谢了
Report : constraint
-all_violators
-path slack_only
Design : sigma
Version: C-2009.06-SP3
Date: Mon Jan 14 14:53:28 2013
****************************************
min_delay/hold ('clk' group)
EndpointSlack
-----------------------------------------------------------------
u1/b0_reg/RN-2.45(VIOLATED)
u1/b4_reg/RN-2.45(VIOLATED)
u1/b1_reg/RN-2.45(VIOLATED)
u1/b2_reg/RN-2.45(VIOLATED)
u1/b3_reg/RN-2.45(VIOLATED)
u2/b0_reg/RN-2.40(VIOLATED)
u2/b1_reg/RN-2.40(VIOLATED)
u2/b2_reg/RN-2.40(VIOLATED)
u2/b3_reg/RN-2.40(VIOLATED)
Warning: Transition times on not annotated delay arcs havebeen set to zero. Cannot perform max_transition checking. (PTE-057)
max_capacitance
RequiredActual
PinCapacitanceCapacitanceSlack
-----------------------------------------------------------------
U100/Y0.160.16-0.01(VIOLATED)
U112/Y0.160.16-0.01(VIOLATED)

hold问题需要提交后端解决。作为前端工程师，你要分析具体路径，分析出hold违反的原因。