[b]about dc-offset compensation in amplifier[/b]

Would any people like to introduce me some good book or material,which
describe the detail of DC offset compensation feedback of
multistage-amplifier?

I am currently working on high-speed limiting amplifier, however still
not clear about the usage of the DC feed-back. Personally, I think it
make the circuit operating point insensible to process variation. Right?

Some paper integrated the DC-feedback path on-chip, some put it outside and make it tunable. Which way is used for which reason?

Can any one give me a clear picture of it? Any material or paper
introduce it will be very helpful to me, thank you!

Bi, Han

Put it on chip or not depends the lower cut-off frequency of the amplifier. It is clear that it will not pass DC and some low frequency components since the feedback circuit is trying to balance DC components. Some large capacitance is needed.

MWPro and Mike,

I'm not clear about the amplifier power range you indicated?
For GSM system using DCR, really one DC offset correct loop circuit applied to one of the multi-stage or cascaded amplifiers where it build up a receive automatic gain control amplifier stages. It use capacitor to capture DC changes at the output port then compensate the correction coefficient and applied to input port through feedback loop path. You can refer to some world leading GSM
RF solution vendors application, Skyworks, analog device, Renesas...
Hope it helps!

With regards,

I guess Mike is asking for help of common mode feedback, if the circuit is meant to fix the operation point and prevent it to be affected by process variation.

I think DC feedback(common mode feedback) and DC-offset feedback are two different things.

Hi,

This paper may help you some.

Good luck!

Ruri