PA matching questions (conceptual)
I am a beginning starting to learn RF PA design and I have some questions on the matching networks.
I know that for max power transfer, source and load reflection coefficient must be complex conjugate matched to the matched load reflection coefficient and the matched source reflection coefficient, (or S11 and S22 in the unilateral case). Also, the generator impedance needs to be matched to the line and the load needs to be matched to the line so that there is no reflection taking place at either the generator or load. Essentially, the source or load reflections coefficients must be zero, and the reflection looking from the input and output of the transistor to the source and load are the ones we tailor for gain or noise performance.
However, the first requirement that the source and load reflection equal zero seems to imply that the generator and load impedance must be equal to the line impedance, which I don't think is the case. Moving on, then the input matching network would be placed between the source and the transistor input, and the output matching network would be placed between the load and the transistor output to obtain the required impedances for complex conjugate matched load reflection coefficient and matched source reflection coefficient. This doesnt seem to be correct. Where am I going wrong here?
Thanks a bunch
The generator and load should be matched to the line impedance or else power and gain will change as line length varies, or ripple over frequency since electrical length is changing.
For a PA you do not want to conjugate match the transistor to the load. You want to choose the load that allows the transistor to generate the maximum power. The proper load line allows the transistor to swing betwween (almost) breakdown and maximum current, while resonating out any output capacitance.
Take a look at some of Steve Cripps' books or papers.
There is no confilct. In unilateral cases, both input matching and output matching are with the same principle, so only input matching is discussed here.
Firstly, set reference point as the input of transistor. Look into the transistor, the reflection coefficient is S11, so to do the power matching , the sorce reflection coefficient should be tuned to S11*[T]. A passive-lossless matching network is designed for the matching. S22[M] of the matching network should be S11*[T]. Considering the unitarity of a passive-lossless network, the input reflection coefficient should be zero when the output is connected to a load with the reflection coefficient of S11[T]. The unitarity mean [Sm]^T.[Sm]=[E]. Where "^T" means transpose, and [E] means unit matrix.
So the conjugate matching at the above reference point yields the input reflection coefficient of the matched network to zero.
Load pulling the input and the output in order to generate load circles on the Smith chart is the practical way to do this, either in the simulator or on the bench. Theoretical matching starts to depart from reality with Power amplifiers.