help :VCO jitter simulation!
时间:04-09
整理:3721RD
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how to add the noise sources for VCO jitter simulation?
i did it as follow for the power(VDD) noise source :
VPDD VDD VSS sin(1.8v 0.1v 20000k).
is it right?
anyone answer it for me?thx very much!
i did it as follow for the power(VDD) noise source :
VPDD VDD VSS sin(1.8v 0.1v 20000k).
is it right?
anyone answer it for me?thx very much!
Hi
You need simulate power supply noise impact on VCO jitter, if i have proper understanding of You mail
Use phase noise analysis. jitter=integrated phase noise*w0
Include voltage noise source in supply net: resistor with parallel capacitor in the input of voltage controled voltage source.
The mean square value of noise will be kT/C. T is resistor temperature in Kelvin
You can control bandwidth of noise via resistor value.
Regards
