微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 微波和射频技术 > 天线设计和射频技术 > The reason of negative Kvco

The reason of negative Kvco

时间:04-04 整理:3721RD 点击:
Hi all,
I recently studied about the PLL and synthesizer and got a LMX2531 EVM.
When measuring the tuning voltage vs output frequency, I found that the frequency decreasing as tuning voltage rises i.e. negative Kvco. And the result is in the following figure.

To the best of my knowledge, typical Kvco is positive because the capacitance of varactor diode is reduced as the tuning voltage increasing which will increase the oscillation frequency.

What is the possible reason for this result?

The VCO is inside the IC, how do you know that the control voltage is connected to the cathode of a varactor diode. It might be connected to the anode, or involve additional active circuits.

Interesting, the K_Vtune in the datasheet is positive. Are you sure you are measuring it well?
http://www.ti.com/lit/ds/symlink/lmx2531.pdf
(page 9)

yes, what he said!
Since the tuning voltage is generated with an internal charge pump, it is likely that one terminal of the varactor is tied to something like 3.0 V internally.

Wow, never thought about this! Thank you!
Is there any benefit to connect varactor in this way?

when you are designing a MMIC circuit, there are all sorts of advantages to doing things an odd way. Some are dictated by the substrate material used and if it need to be a reverse biased buried diode...some are done for chip size reduction, some are done because there are breakdown voltage limitations or device type limitations. The varactor diode i drew, for instance, may not be an actual diode at all, but part of a transistor, etc.

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top