简单的反相器仿真出错问题
时间：10-02
整理：3721RD
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用ic5141做了一个简单的反相器仿真，之前用gsmc0.18库做过，是成功的，现在完全按照之前步骤用csms0.25库，报错了。
报错信息:
************************************************
Transient Analysis `tran': time = (0 s -> 20 ns)
************************************************
Trying `homotopy = gmin' for initial conditions.
Trying `homotopy = source' for initial conditions.
Trying `homotopy = dptran' for initial conditions.
Trying `homotopy = ptran' for initial conditions.
Trying `homotopy = arclength' for initial conditions.
None of the instantiated devices support arclength homotopy. Skipping.
Error found by spectre during IC analysis, during transient analysis `tran'.
No DC solution found (no convergence).
The values for those nodes that did not converge on the last Newton iteration
are given below.Also given is the manner in which the convergence
criteria were not satisfied in the following form:
Failed test: | Value | > RelTol*Ref + AbsTol
V(out) = 0 V
residue too large: | -13.3964 pA | > 3.86668 pA + 1 pA
V(pmos:int_d) = 0 V
residue too large: | 8.94089 pA | > 7.62449 pA + 1 pA
The following set of suggestions may help you avoid these convergence
difficulties.Once you have a solution, write it to a nodeset file
using the `write' parameter, and read it back in on subsequent
simulations using the `readns' parameter.
1.Carefully evaluate and resolve any notice, warning or error messages.
2.Perform sanity checking on the parameter values using the parameter range
checker (use ``+param param-limits-file'' as a command line argument)
and heed any warnings.Print the minimum and maximum parameter value
using the `info' analysis.Assure that the bounds given for instance,
model, output, temperature-dependent, and operating-point (if possible)
parameters are reasonable.
3.Check the direction of both independent and dependent current sources.
Convergence problems can result if current sources are connected such
that they force current backward through diodes.
4.Enable diagnostic messages by setting option `diagnose=yes'.
5.Small floating resistors connected to high impedance nodes can cause
convergence difficulties.Avoid very small floating resistors,
particularly small parasitic resistors in semiconductors.Use voltage
sources or iprobes to measure current rather than small resistors.
6.If you have an estimate of what the solution should be, use nodeset
statements or a nodeset file and set as many nodes as possible.
7.Use realistic device models.Check all component parameters, particularly
nonlinear device model parameters, to assure that they are reasonable.
8.If simulating a bipolar analog circuit, assure the region parameter on all
transistors and diodes is set correctly.
9.Loosen tolerances, particularly absolute tolerances like `iabstol' (on
options statement).If tolerances are set too tight, they might
preclude convergence.
10.Increase the value of gmin (on options statement).
11.Use numeric pivoting in the sparse matrix factorization by setting
`pivotdc=yes' (on options statement).Sometimes it is also necessary
to increase the pivot threshold to somewhere in the range of 0.1 to 0.5
using `pivrel' (on options statement).
12.Try to simplify the nonlinear component models in order to avoid regions
in the model that may contribute to convergence problems.
13.Divide the circuit into smaller pieces and simulate them individually, but
be careful to assure that the results will be close to what they would
be if the rest of the circuit was present.Use the results to generate
nodesets for the whole circuit.
14.If all else fails, replace the DC analysis with a transient analysis and
modify all the independent sources to start at zero and ramp to their
DC values.Run the transient analysis well beyond the time when all
the sources have reached their final value (remember that transient
analysis is very cheap when all of the signals in the circuit are not
changing) and write the final point to a nodeset file. To make the
transient analysis more efficient set the integration method to
backward Euler (`method=euler') and loosen the local truncation error
criteria by increasing `lteratio', say to 50. Occasionally, this
approach will fail or be very slow because the circuit contains an
oscillator.Often times the oscillation can be eliminated for the sake
of finding the dc solution by setting the minimum capacitance from each
node to ground (`cmin') to a large value.
Analysis `tran' terminated prematurely due to error.
finalTimeOP: writing operating point information to rawfile.
Error found by spectre during DC analysis, during info `finalTimeOP'.
Analysis skipped due to inability to compute operating point.
Analysis `finalTimeOP' terminated prematurely due to error.
modelParameter: writing model parameter values to rawfile.
element: writing instance parameter values to rawfile.
outputParameter: writing output parameter values to rawfile.
designParamVals: writing netlist parameters to rawfile.
primitives: writing primitives to rawfile.
subckts: writing subcircuits to rawfile.
请多指教~
报错信息:
************************************************
Transient Analysis `tran': time = (0 s -> 20 ns)
************************************************
Trying `homotopy = gmin' for initial conditions.
Trying `homotopy = source' for initial conditions.
Trying `homotopy = dptran' for initial conditions.
Trying `homotopy = ptran' for initial conditions.
Trying `homotopy = arclength' for initial conditions.
None of the instantiated devices support arclength homotopy. Skipping.
Error found by spectre during IC analysis, during transient analysis `tran'.
No DC solution found (no convergence).
The values for those nodes that did not converge on the last Newton iteration
are given below.Also given is the manner in which the convergence
criteria were not satisfied in the following form:
Failed test: | Value | > RelTol*Ref + AbsTol
V(out) = 0 V
residue too large: | -13.3964 pA | > 3.86668 pA + 1 pA
V(pmos:int_d) = 0 V
residue too large: | 8.94089 pA | > 7.62449 pA + 1 pA
The following set of suggestions may help you avoid these convergence
difficulties.Once you have a solution, write it to a nodeset file
using the `write' parameter, and read it back in on subsequent
simulations using the `readns' parameter.
1.Carefully evaluate and resolve any notice, warning or error messages.
2.Perform sanity checking on the parameter values using the parameter range
checker (use ``+param param-limits-file'' as a command line argument)
and heed any warnings.Print the minimum and maximum parameter value
using the `info' analysis.Assure that the bounds given for instance,
model, output, temperature-dependent, and operating-point (if possible)
parameters are reasonable.
3.Check the direction of both independent and dependent current sources.
Convergence problems can result if current sources are connected such
that they force current backward through diodes.
4.Enable diagnostic messages by setting option `diagnose=yes'.
5.Small floating resistors connected to high impedance nodes can cause
convergence difficulties.Avoid very small floating resistors,
particularly small parasitic resistors in semiconductors.Use voltage
sources or iprobes to measure current rather than small resistors.
6.If you have an estimate of what the solution should be, use nodeset
statements or a nodeset file and set as many nodes as possible.
7.Use realistic device models.Check all component parameters, particularly
nonlinear device model parameters, to assure that they are reasonable.
8.If simulating a bipolar analog circuit, assure the region parameter on all
transistors and diodes is set correctly.
9.Loosen tolerances, particularly absolute tolerances like `iabstol' (on
options statement).If tolerances are set too tight, they might
preclude convergence.
10.Increase the value of gmin (on options statement).
11.Use numeric pivoting in the sparse matrix factorization by setting
`pivotdc=yes' (on options statement).Sometimes it is also necessary
to increase the pivot threshold to somewhere in the range of 0.1 to 0.5
using `pivrel' (on options statement).
12.Try to simplify the nonlinear component models in order to avoid regions
in the model that may contribute to convergence problems.
13.Divide the circuit into smaller pieces and simulate them individually, but
be careful to assure that the results will be close to what they would
be if the rest of the circuit was present.Use the results to generate
nodesets for the whole circuit.
14.If all else fails, replace the DC analysis with a transient analysis and
modify all the independent sources to start at zero and ramp to their
DC values.Run the transient analysis well beyond the time when all
the sources have reached their final value (remember that transient
analysis is very cheap when all of the signals in the circuit are not
changing) and write the final point to a nodeset file. To make the
transient analysis more efficient set the integration method to
backward Euler (`method=euler') and loosen the local truncation error
criteria by increasing `lteratio', say to 50. Occasionally, this
approach will fail or be very slow because the circuit contains an
oscillator.Often times the oscillation can be eliminated for the sake
of finding the dc solution by setting the minimum capacitance from each
node to ground (`cmin') to a large value.
Analysis `tran' terminated prematurely due to error.
finalTimeOP: writing operating point information to rawfile.
Error found by spectre during DC analysis, during info `finalTimeOP'.
Analysis skipped due to inability to compute operating point.
Analysis `finalTimeOP' terminated prematurely due to error.
modelParameter: writing model parameter values to rawfile.
element: writing instance parameter values to rawfile.
outputParameter: writing output parameter values to rawfile.
designParamVals: writing netlist parameters to rawfile.
primitives: writing primitives to rawfile.
subckts: writing subcircuits to rawfile.
请多指教~
顶一个~
我也是这个问题，求高手解答啊
我也是，有解决吗
顶一下
小编问题解决了么?
怎么解决的?我在做sonnet 和cadence联合仿真也遇到这样问题，这个问题怎么解决呢?
你的是不是从别的地方拷贝过来的?如果这样有可能是用到的某些器件没拷贝全
同样的问题，小编解决了么?
小编和我是同一个人，后来发现是工艺库的问题。版本升级后就OK 了。
当然是找foundry厂拿新版本的工艺库