反相器 Calibre LVS报错

刚开始学习版图，简单画了个反相器，好不容易过了DRC，现在LVS又卡住了。LVS report 如下，还请高手指导，谢谢！
Error:Instances of different types or subtypes were matched.
LAYOUT CELL NAME:inv
SOURCE CELL NAME:inv
--------------------------------------------------------------------------------------------------------------
INITIAL NUMBERS OF OBJECTS
--------------------------
LayoutSourceComponent Type
--------------------------
Ports:44
Nets:44
Instances:01*MN (4 pins)
10*n11lvt_ckt (4 pins)
01*MP (4 pins)
10*p11lvt_ckt (4 pins)
------------
Total Inst:22
NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
LayoutSourceComponent Type
--------------------------
Ports:44
Nets:44
Instances:11_invv (4 pins): in out sup1 sup2
------------
Total Inst:11
* = Number of objects in layout different from number in source.
**************************************************************************************************************
INCORRECT OBJECTS
**************************************************************************************************************
LEGEND:
-------
ne= Naming Error (same layout name found in source
circuit, but object was matched otherwise).
**************************************************************************************************************
INCORRECT INSTANCES
DISC#LAYOUT NAMESOURCE NAME
**************************************************************************************************************
1(_invv)(_invv)
bad component type
Devices:
X1(-2.080,-2.020)p11lvt_cktMX1MP(P11LVT_CKT)
X0(-2.080,-2.876)n11lvt_cktMX0MN(N11LVT_CKT)
**************************************************************************************************************
INFORMATION AND WARNINGS
**************************************************************************************************************
MatchedMatchedUnmatchedUnmatchedComponent
LayoutSourceLayoutSourceType
-----------------------------------------
Ports:4400
Nets:4400
Instances:1100_invv
--------------------------------
Total Inst:1100
o Initial Correspondence Points:
Ports:VDD GND IN OUT
**************************************************************************************************************
SUMMARY
**************************************************************************************************************
Total CPU Time:0 sec
Total Elapsed Time:0 sec

某个标示层没画吧，具体是哪层要看layout rule

你高压层没画吧?找个库里你要画的N管和P管类型，看看layout层次结构

问题解决了，是工艺库的问题。感谢你提出的排错思路，谢谢！

问题解决了，是工艺库没有配好，搞乱了。这个是Low Vt的。感谢你提出的排错思路，谢谢！