vcs仿真带sdf的问题
initial begin
$sdf_annotate("./SM2TOP_2016_dc.sdf",Top_2016tb,,, "TYPICAL",,);
end
上面的initial是我在激励文件加的sdf文件。 Top_2016tb是我激励文件的module名字,这个位置难道不是写这个名字吗?
SDF Info: +pulse_r/100, +pulse_e/100 in effect
Warning-[SDFCOM_ICBF] Instance cannot be found
./SM2TOP_2016_dc.sdf, 16
SDF Warning: Instance Top_2016tb of type "SM2TOP_2016" cannot be found .
Warning-[SDFCOM_ICBF] Instance cannot be found
./SM2TOP_2016_dc.sdf, 19000
SDF Warning: Instance U3452 of type "AOI32X1" cannot be found under
Top_2016tb
Warning-[SDFCOM_ICBF] Instance cannot be found
./SM2TOP_2016_dc.sdf, 19031
SDF Warning: Instance U3451 of type "NAND2X1" cannot be found under
Top_2016tb
顶一个
Top_2016tb这个位置填的是instance名字,不知道你说的module名字跟我说的instance名字是不是同一个意思。
激励文件是像下面那样吗?
module Top_top;
...
SM2TOP_2016 Top_2016tb( pinA, pinB... );
initial begin
$sdf_annotate("./SM2TOP_2016_dc.sdf",Top_2016tb,,, "TYPICAL",,);
end
是这样,激励文件是我师兄写的,Top_2016tb就是激励文件中源代码的module,SM2TOP_2016是我真正dc综合的module名字。例子如下。 其实我就想问下,我的sdf后面那个顶层名字必须是我dc综合的module名字吧,我我看网上说那个名字都是激励文件的moduele名字,但是我做就报错误 想确认下具体用哪个名字哈。 刚接触仿真,问题有点简单,还望多多指教哈。
module Top_2016tb;
// Inputs
reg clk;
reg rst_n;
reg [1:0] SignOrVerify;
reg Start;
reg Read;
reg Write;
reg [5:0] RWDest;
reg [15:0] DataIn;
reg [271:0] k,e,d;
reg [271:0] x1 = 272'h0;
reg [271:0] y1 = 272'h0;
reg [271:0] z1 = 272'h0;
// Outputs
wire VerResult;
wire [2:0]Flag;
wire [16:0] DataOut;
integer i;
// Instantiate the Unit Under Test (UUT)
SM2TOP_2016#
(
.MODE(1)
)
uut
(
.clk(clk),
.rst_n(rst_n),
.SignOrVerify(SignOrVerify),
.Start(Start),
.Read(Read),
.Write(Write),
.RWDest(RWDest),
.DataIn(DataIn),
.VerResult(VerResult),
.Flag(Flag),
.DataOut(DataOut)
);
//initial begin
//$sdf_annotate("./SM2TOP_2016_dc.sdf",SM2TOP_2016,,, "TYPICAL",,);
//end
应该是Top_2016tb.uut
谢谢哈,我试一下哈。非常感谢您哈,。