初次接触DC，时序报告，违例

Information: Propagating switching activity (low effort zero delay simulation). (PWR-6)
Warning: Design has unannotated primary inputs. (PWR-414)
Warning: Design has unannotated sequential cell outputs. (PWR-415)
****************************************
Report : constraint
-all_violators
Design : aes_ASIC
Version: C-2009.06-SP5
Date: Wed Oct 15 23:21:06 2014
****************************************

min_delay/hold ('wb_clk' group)
RequiredActual
EndpointPath DelayPath DelaySlack
-----------------------------------------------------------------
PAD_wb_ack_o2.101.43 f-0.67(VIOLATED)
PAD_wb_dat_o[0]2.101.44 f-0.66(VIOLATED)
PAD_wb_dat_o[1]2.101.44 f-0.66(VIOLATED)
PAD_wb_dat_o[2]2.101.44 f-0.66(VIOLATED)
PAD_wb_dat_o[3]2.101.44 f-0.66(VIOLATED)
PAD_wb_dat_o[4]2.101.44 f-0.66(VIOLATED)
PAD_wb_dat_o[5]2.101.44 f-0.66(VIOLATED)
PAD_wb_dat_o[6]2.101.44 f-0.66(VIOLATED)
PAD_wb_dat_o[7]2.101.44 f-0.66(VIOLATED)
这是其中一部分，大神们帮忙看看，1.43f啥意思?另外哪里有时序报告教程?

顶一顶

帮顶！

fall，剩下还有rise，STA基础，论坛资料区里有很多

感觉要学的好多啊。

Holdviolator综合的时候可以不用管，等到后端插Buffer来解决~