LVS 求救，如果您知道请帮帮忙哦，谢谢哦

因为需要，对工艺厂提供的电感的pcell 重新的设计了下，同时LVS文件也要跟着做更改，我做了些更改了，但是还是没有办法更改正确，所以想群求高手的帮助，如果你知道请帮帮忙，谢谢你。


工艺：tsmc18sige3p4m


问题：1.当W SR 在一定的范围内时，器件可以认被认出来，但是 WS是不正确的。
2.当W S R超出一个范围后，器件就直接被当作不认识了。

希望得到的解决方案是：不管WSR 是什么值，器件都可以被认出来。



1.当W SR 在一定的范围内时，器件可以认被认出来，但是 WS是不正确的电路图，版图和LVS结果

2.当W S R超出一个范围后，器件就直接被当作不认识了的
电路图，版图和LVS结果

我修改的LVS规则

LAYER NEPI172//N_epilayer
LAYER RFDUMMYX160//FOR normal RF device dummylayer
LAYER ADTERM308
LAYER MAP 160 DATATYPE 1 308//FOR RF device additionalterminal dummy layer
LAYER INDDMY139//dummy layer to form spiral inductor
LAYER M431//Metal-4
LAYER DUM4319
LAYER MAP 31 DATATYPE 1 319//dummy metal M4
LAYER M4SLOT325
LAYER MAP 31 DATATYPE 2 325//M4 slot
LAYER M328//Metal-3
LAYER DUM3318
LAYER MAP 28 DATATYPE 1 318//dummy metal M3
LAYER M3SLOT324
LAYER MAP 28 DATATYPE 2 324//M3 slot
LAYER M218//Metal-2

sz_inddmy = SIZE INDDMY BY -50
ovlp_inddmy = INDDMY NOT sz_inddmy
mt_1ovlp_inddmy = metal3a AND ovlp_inddmy
inddmy_std = INDDMY INTERACT mt_1ovlp_inddmy
ind_std_dmy = ind_dmy INTERACT inddmy_std
sym_all_dmy = ind_dmy NOT INTERACT ind_std_dmy

sym_all_ind1 = mt4x AND sym_all_dmy
indpin = metal3a AND ind_dmy

sz_inddmy_1 = SIZE INDDMY BY -40
mt_1_ind = M1 AND sz_inddmy_1
ind_ct_dmy = sym_all_dmy INTERACT mt_1_ind//SYM_CT inductor dummy
ct_ind1 = metal2a AND sym_all_dmy
ct_ind2 = SIZE ct_ind1 BY 2
ct_ind3 = SIZE ct_ind2 BY -2
ct_hole = HOLESct_ind3
ct_ind4 = ct_ind1 INTERACT ct_hole
ct_mt1 = ct_ind1 NOT ct_ind4
ct_mt2 = ct_mt1 AND s_ind_dmy
ct_ind5 =ct_mt1 INTERACT ct_mt2
ct_mt = ct_mt1 NOT ct_ind5
indpin1 = metal1a AND （SIZEind_dmyBY -40）
indpin2 =metal2a AND ind_dmy
indpin = metal3a AND ind_dmy
sym_all_indcc = indpin1 OR indpin2
sym_all_indc = sym_all_indcc OR indpin
sym_all_ind2 = sym_all_ind1 OR sym_all_indc
sz_sym_ind1 = SIZE sym_all_ind2 BY 3
sz_sym_ind = SIZE sz_sym_ind1 BY -3//maximum spacing 3 um
sym_hole = HOLES sz_sym_ind

sym_all_ind3 = sz_sym_ind INTERACT sym_hole
sym_all_ind = sym_all_ind2 INTERACT sym_all_ind3

sz_sym_hole1 = SIZE sym_hole BY -29
sz_sym_hole = SIZE sz_sym_hole1 BY 29//(min. rad minus 1)
s_spacing1 = sym_hole NOT sz_sym_hole
s_spacing = s_spacing1 INTERACT sz_sym_hole
h_s_sp_sym_ind = sym_all_ind INTERACT s_spacing
no_s_sp_sym_ind1 = sym_all_ind NOT h_s_sp_sym_ind
ag_sz_sym_hole = sym_hole INTERACT no_s_sp_sym_ind1
ag_s_spacing1 = SIZE ag_sz_sym_hole BY -39
ag_s_spacing2 = SIZE ag_s_spacing1 BY 39
ag_s_spacing3 = ag_sz_sym_hole NOT ag_s_spacing2
ag_s_spacing = ag_s_spacing3 INTERACT ag_s_spacing2
ag_h_s_sp_sym_ind = no_s_sp_sym_ind1 INTERACT ag_s_spacing
no_s_sp_sym_ind = no_s_sp_sym_ind1 NOT ag_h_s_sp_sym_ind
one_sz_sym_ind = sz_sym_ind INTERACT no_s_sp_sym_ind
re_sym_ind1 = one_sz_sym_ind NOT no_s_sp_sym_ind
re_sym_ind2 = re_sym_ind1 OR s_spacing
re_sym_ind = re_sym_ind2 OR ag_s_spacing

sym_rad1 = EXT sym_all_ind re_sym_ind < 361 OPPOSITE REGION PARALLELONLY EXCLUDE SHIELDED
sym_rad= sym_rad1 AND sym_hole

mt_2_ind = M2 AND sym_all_dmy
ind_ct_dmy = sym_all_dmy INTERACT mt_2_ind//SYM_CT inductor dummy

ct_ind = sym_all_ind AND ind_ct_dmy


indpin = metal3a AND ind_dmy

ind_btm1 = indpin AND std_ind
ind_btm2 = indpin AND sym_all_ind1
ind_btm3 = ind_btm1 OR ind_btm2
ind_via = VIA3 AND ind_dmy
ind_btm = ind_btm3 INTERACT ind_via

ind_btm_sym = ind_btm OR re_sym_ind

w_std_ind = std_ind AND sz_inddmy
w_all_ind = w_std_ind OR sym_all_ind
segs_not_end1 = INT w_all_ind < 46 OPPOSITE REGION PARALLEL ONLYEXCLUDE SHIELDED // "15" is atrade number from spice model
segs_not_end= RECTANGLE segs_not_end1 ORTHOGONAL ONLY

w_std_ind = std_ind AND sz_inddmy
w_all_ind = w_std_ind OR sym_all_ind
all_ind = std_ind OR sym_all_ind

ind_mt = ind_mt1 NOT std_ind5

gaps_not_end1 = EXT all_ind <= 3 OPPOSITE REGION PARALLEL ONLY// "3" is atrade number from spicemodel
gaps_not_end2 = EXT all_ind ind_mt <= 3 OPPOSITE REGION PARALLEL ONLY//"3" is a trade numberfrom spice model
gaps_not_end3 = gaps_not_end1 OR gaps_not_end2
gaps_not_end= gaps_not_end3 INTERACT segs_not_end

DEVICE spiral_s2_sym_ct ct_ind_s2 metal4(PLUS) metal4(MINUS) psub(BULK)indpin1(CTAP) <sym_rad><ct_ind> <ind_btm_sym>
<segs_not_end> <gaps_not_end><re_sym_ind>
[
PROPERTY W,S,NR,RAD,LAY
LAY=4
NR = ((count(ind_btm_sym)-2)/2)+1
RAD = (perimeter(sym_rad) - perimeter_coincide(sym_rad,re_sym_ind)-perimeter_coincide (sym_rad,ct_ind))/4
NW = count(segs_not_end)
W = (perimeter_inside(segs_not_end,ct_ind))/(NW*2-2)
NS = count(gaps_not_end)
S = (perimeter(gaps_not_end) -
perimeter_coincide(gaps_not_end,ct_ind))/(NS*2)
]
TRACE PROPERTY spiral_s2_sym_ct LAY LAY 0
TRACE PROPERTY spiral_s2_sym_ct W W 0
TRACE PROPERTY spiral_s2_sym_ct S S 0
TRACE PROPERTY spiral_s2_sym_ct NR NR 0
TRACE PROPERTY spiral_s2_sym_ct RAD RAD 0

上乾坤 下八卦 風生水起 河洛八卦
如果認出 device 那 WSR 通常 會不對
因為 認device 的方式 和 認 WSR 方式不同
你是改 PDK 還是 改 layout

改了PDK ，提取 W S R 的那些语句看不懂，如果你知道怎么改，请帮帮忙吧，谢谢你。

改了 PDK ，提取 W S R的那些语句看不懂，如果你知道怎么改，麻烦你帮帮忙吧，谢谢你。

PROPERTY W,S,NR,RAD,LAY
LAY=4
NR = ((count(ind_btm_sym)-2)/2)+1
RAD = (perimeter(sym_rad) - perimeter_coincide(sym_rad,re_sym_ind)-perimeter_coincide (sym_rad,ct_ind))/4
NW = count(segs_not_end)
W = (perimeter_inside(segs_not_end,ct_ind))/(NW*2-2)
NS = count(gaps_not_end)
S = (perimeter(gaps_not_end) -
perimeter_coincide(gaps_not_end,ct_ind))/(NS*2)
這段就是
找出每各 元素如何組成
如 S 要找出 gaps_not_endgaps_not_end,ct_ind ... ... 等等

KANBUDONG