TSMC DRC及LVS 警告问题
时间：10-02
整理：3721RD
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基于TSMC做了一个运放的版图，进行DRC检查时出现很多下述错误：
Check CSR.R.1.NWELLi {@ If customer request TSMC to add CSR，seal ring and CDU,empty areas at 4 chips corners must be reserved and no layout is allowed inside.EMPTY_AREA AND NWELLi}
Check CSR.R.1.POPLYGi {@ If customer request TSMC to add CSR，seal ring and CDU,empty areas at 4 chips corners must be reserved and no layout is allowed inside.EMPTY_AREA AND POPLYGi}
Check CSR.R.1.PIMPi {@ If customer request TSMC to add CSR，seal ring and CDU,empty areas at 4 chips corners must be reserved and no layout is allowed inside.EMPTY_AREA AND PIMPi}
Check CSR.R.1.NIMPi {@ If customer request TSMC to add CSR，seal ring and CDU,empty areas at 4 chips corners must be reserved and no layout is allowed inside.EMPTY_AREA AND NIMPi}
Check CSR.R.1.CONTi {@ If customer request TSMC to add CSR，seal ring and CDU,empty areas at 4 chips corners must be reserved and no layout is allowed inside.EMPTY_AREA AND CONTi}
.....
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忽略上述错误做LVS时，虽然露出笑脸，验证通过，但是在 Exteaction Results中提示下述Warning：
WARNING: Invalid PATHCHK request " ！ POWER": no POWER nets present, operation aborted.
WARNING: Invalid PATHCHK request " ！ GROUND": no GROUNDnets present, operation aborted.
WARNING: Invalid PATHCHK request "GROUND && ！ POWER": no POWER nets present, operation aborted.
WARNING: Invalid PATHCHK request "POWER && ！ GROUND": no POWER nets present, operation aborted.
WARNING: Invalid PATHCHK request "！ POWER && ！ GROUND": no POWER nets present, operation aborted.
哪位大侠遇到过这种问题，请指教
Check CSR.R.1.NWELLi {@ If customer request TSMC to add CSR，seal ring and CDU,empty areas at 4 chips corners must be reserved and no layout is allowed inside.EMPTY_AREA AND NWELLi}
Check CSR.R.1.POPLYGi {@ If customer request TSMC to add CSR，seal ring and CDU,empty areas at 4 chips corners must be reserved and no layout is allowed inside.EMPTY_AREA AND POPLYGi}
Check CSR.R.1.PIMPi {@ If customer request TSMC to add CSR，seal ring and CDU,empty areas at 4 chips corners must be reserved and no layout is allowed inside.EMPTY_AREA AND PIMPi}
Check CSR.R.1.NIMPi {@ If customer request TSMC to add CSR，seal ring and CDU,empty areas at 4 chips corners must be reserved and no layout is allowed inside.EMPTY_AREA AND NIMPi}
Check CSR.R.1.CONTi {@ If customer request TSMC to add CSR，seal ring and CDU,empty areas at 4 chips corners must be reserved and no layout is allowed inside.EMPTY_AREA AND CONTi}
.....
....
忽略上述错误做LVS时，虽然露出笑脸，验证通过，但是在 Exteaction Results中提示下述Warning：
WARNING: Invalid PATHCHK request " ！ POWER": no POWER nets present, operation aborted.
WARNING: Invalid PATHCHK request " ！ GROUND": no GROUNDnets present, operation aborted.
WARNING: Invalid PATHCHK request "GROUND && ！ POWER": no POWER nets present, operation aborted.
WARNING: Invalid PATHCHK request "POWER && ！ GROUND": no POWER nets present, operation aborted.
WARNING: Invalid PATHCHK request "！ POWER && ！ GROUND": no POWER nets present, operation aborted.
哪位大侠遇到过这种问题，请指教
LVS的warning已解决，是因为自己在电源和地命名的时候用的“VDDA”和“GNDA” 在.lvs文件中不识别，更改.lvs文件把这连个符号加进去就ok了。 DRC的问题依然待解决......
继续求解答......
highlight的地方如果要求加CSR，seal ring and CDU，4个角的地方就空着不能画layout
小编问题解决了吗?我也遇到同样的DRC问题，不知道该怎么弄。希望会的大神们不吝赐教，谢谢
同遇到这个问题，不知小编解决没有，或者有没有大神帮忙解决一下，谢谢
define full_chip 关闭， 如果不是chip是block的话，请不要开这个选项
检查corner pad的，有corner pad才行
原则上chip corner的区域是不可以放一些电路功能的layout，除非之前有以身试法过
corner很有讲究的， 不是随便那么设计的，
涨涨人气
我运行LVS时候也出现了POWER GROUND 的问题，我在原理图中和LAYOUT层都是用的vdd！ gnd！ 我在LVS中也罢这两个加紧去了。可是还是显示有问题
请问大神，这个difine fullchip的选项在哪里?是版图编辑界面吗?
学习了。
lvs runset里面，