KT猎头代招-physical design engineer（南京）
时间：12-12
整理：3721RD
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美资著名芯片公司招聘数字后端设计工程师，工作地点在南京，请有兴趣的朋友和我联系，也欢迎推荐朋友！raymond-chen@kthr.com
enior Physical Design Engineer
Location: Nanjing
Experience: 5+ years in physical implementation engineering
Essential skills
MS in EE required.oProven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills
oExperience with Magma or Synopsys place-and-route tool set and physical design project implementation.
oGood programming skill. Capable of writing Tcl or Perl.
oFamiliar with synthesis, static timing analysis.
oSelf-motivated team worker, good verbal and written communication skills in English.
oTechnical and team leadership proffered. Previous management experience highly desired.
oExperience with synthesis, DFT, and verification is preferred.
Key Responsibilities
Depending on experience, key responsibilities will involve some of the following:
oIC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification.
oAs a key member of physical design team, your will work on one of most advanced and the most complex chip designed.
oLeading a team of physical design engineers and resolving the technical related issues.
oCrosstalk analysis, power analysis, and static timing analysis.
oWrite scripts in Tcl to improve productivity.
enior Physical Design Engineer
Location: Nanjing
Experience: 5+ years in physical implementation engineering
Essential skills
MS in EE required.oProven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills
oExperience with Magma or Synopsys place-and-route tool set and physical design project implementation.
oGood programming skill. Capable of writing Tcl or Perl.
oFamiliar with synthesis, static timing analysis.
oSelf-motivated team worker, good verbal and written communication skills in English.
oTechnical and team leadership proffered. Previous management experience highly desired.
oExperience with synthesis, DFT, and verification is preferred.
Key Responsibilities
Depending on experience, key responsibilities will involve some of the following:
oIC implementation from netlist to gdsii, with synthesis, floorplanning, place and route, timing closure, and physical verification.
oAs a key member of physical design team, your will work on one of most advanced and the most complex chip designed.
oLeading a team of physical design engineers and resolving the technical related issues.
oCrosstalk analysis, power analysis, and static timing analysis.
oWrite scripts in Tcl to improve productivity.
美满生活，有你有我有他
最近怎么还在招人啊，这个部门是做什么产品的？