在仿真一个电路时出现rror: 这个怎么解决呢 看了好多 一直找不到问题所在
时间：10-02
整理：3721RD
点击：
if(
( (Slave_Floor_2==5'b11000)&&(Now_Floor==5'b00001) )||
( ( (Slave_Floor_1==5'b11000)||(Slave_Floor_1==5'b10001)||(Slave_Floor_1==5'b11001) )&&(Now_Floor=5'b00010) ) ||
( ( (Slave_Floor1==5'b11000)||(Slave_Floor1==5'b10001)||(Slave_Floor1==5'b11001) )&&(Now_Floor=5'b00011) )||
( ( (Slave_Floor2==5'b11000)||(Slave_Floor2==5'b10001)||(Slave_Floor2==5'b11001) )&&(Now_Floor=5'b00100) )||
( ( (Slave_Floor3==5'b11000)||(Slave_Floor3==5'b10001)||(Slave_Floor3==5'b11001) )&&(Now_Floor=5'b00101) )||
( ( (Slave_Floor4==5'b11000)||(Slave_Floor4==5'b10001)||(Slave_Floor4==5'b11001) )&&(Now_Floor=5'b00110) )||
( ( (Slave_Floor5==5'b11000)||(Slave_Floor5==5'b10001)||(Slave_Floor5==5'b11001) )&&(Now_Floor=5'b00111) )||
( ( (Slave_Floor6==5'b11000)||(Slave_Floor6==5'b10001)||(Slave_Floor6==5'b11001) )&&(Now_Floor=5'b01000) )||
( ( (Slave_Floor7==5'b11000)||(Slave_Floor7==5'b10001)||(Slave_Floor7==5'b11001) )&&(Now_Floor=5'b01001) )||
( ( (Slave_Floor8==5'b11000)||(Slave_Floor8==5'b10001)||(Slave_Floor8==5'b11001) )&&(Now_Floor=5'b01010) )||
( ( (Slave_Floor9==5'b11000)||(Slave_Floor9==5'b10001)||(Slave_Floor9==5'b11001) )&&(Now_Floor=5'b01011) )||
( ( (Slave_Floor10==5'b11000)||(Slave_Floor10==5'b10001)||(Slave_Floor10==5'b11001) )&&(Now_Floor=5'b01100) )||
( ( (Slave_Floor11==5'b11000)||(Slave_Floor11==5'b10001)||(Slave_Floor11==5'b11001) )&&(Now_Floor=5'b01101) )||
( ( (Slave_Floor12==5'b11000)||(Slave_Floor12==5'b10001)||(Slave_Floor12==5'b11001) )&&(Now_Floor=5'b01110) )||
( ( (Slave_Floor13==5'b11000)||(Slave_Floor13==5'b10001)||(Slave_Floor13==5'b11001) )&&(Now_Floor=5'b01111) )||
( ( (Slave_Floor14==5'b11000)||(Slave_Floor14==5'b10001)||(Slave_Floor14==5'b11001) )&&(Now_Floor=5'b10000) )||
( ( (Slave_Floor15==5'b11000)||(Slave_Floor15==5'b10001)||(Slave_Floor15==5'b11001) )&&(Now_Floor=5'b10001) )||
( ( (Slave_Floor16==5'b11000)||(Slave_Floor16==5'b10001)||(Slave_Floor16==5'b11001) )&&(Now_Floor=5'b10010) )||
( ( (Slave_Floor17==5'b11000)||(Slave_Floor17==5'b10001)||(Slave_Floor17==5'b11001) )&&(Now_Floor=5'b10011) )||
( (Slave_Floor18==5'b10001)&&(Now_Floor=5'b10100) )
)
大神们帮看看吧 这个有什么问题，我编译一直显示错误** Error: D:/studytool/modelsim/examples/elevator/EDAwork/Slave_Request_Arrive.v(65): near ")": Syntax error. Assignment sub-exprs. are only allowed in SystemVerilog or PSL.
( (Slave_Floor_2==5'b11000)&&(Now_Floor==5'b00001) )||
( ( (Slave_Floor_1==5'b11000)||(Slave_Floor_1==5'b10001)||(Slave_Floor_1==5'b11001) )&&(Now_Floor=5'b00010) ) ||
( ( (Slave_Floor1==5'b11000)||(Slave_Floor1==5'b10001)||(Slave_Floor1==5'b11001) )&&(Now_Floor=5'b00011) )||
( ( (Slave_Floor2==5'b11000)||(Slave_Floor2==5'b10001)||(Slave_Floor2==5'b11001) )&&(Now_Floor=5'b00100) )||
( ( (Slave_Floor3==5'b11000)||(Slave_Floor3==5'b10001)||(Slave_Floor3==5'b11001) )&&(Now_Floor=5'b00101) )||
( ( (Slave_Floor4==5'b11000)||(Slave_Floor4==5'b10001)||(Slave_Floor4==5'b11001) )&&(Now_Floor=5'b00110) )||
( ( (Slave_Floor5==5'b11000)||(Slave_Floor5==5'b10001)||(Slave_Floor5==5'b11001) )&&(Now_Floor=5'b00111) )||
( ( (Slave_Floor6==5'b11000)||(Slave_Floor6==5'b10001)||(Slave_Floor6==5'b11001) )&&(Now_Floor=5'b01000) )||
( ( (Slave_Floor7==5'b11000)||(Slave_Floor7==5'b10001)||(Slave_Floor7==5'b11001) )&&(Now_Floor=5'b01001) )||
( ( (Slave_Floor8==5'b11000)||(Slave_Floor8==5'b10001)||(Slave_Floor8==5'b11001) )&&(Now_Floor=5'b01010) )||
( ( (Slave_Floor9==5'b11000)||(Slave_Floor9==5'b10001)||(Slave_Floor9==5'b11001) )&&(Now_Floor=5'b01011) )||
( ( (Slave_Floor10==5'b11000)||(Slave_Floor10==5'b10001)||(Slave_Floor10==5'b11001) )&&(Now_Floor=5'b01100) )||
( ( (Slave_Floor11==5'b11000)||(Slave_Floor11==5'b10001)||(Slave_Floor11==5'b11001) )&&(Now_Floor=5'b01101) )||
( ( (Slave_Floor12==5'b11000)||(Slave_Floor12==5'b10001)||(Slave_Floor12==5'b11001) )&&(Now_Floor=5'b01110) )||
( ( (Slave_Floor13==5'b11000)||(Slave_Floor13==5'b10001)||(Slave_Floor13==5'b11001) )&&(Now_Floor=5'b01111) )||
( ( (Slave_Floor14==5'b11000)||(Slave_Floor14==5'b10001)||(Slave_Floor14==5'b11001) )&&(Now_Floor=5'b10000) )||
( ( (Slave_Floor15==5'b11000)||(Slave_Floor15==5'b10001)||(Slave_Floor15==5'b11001) )&&(Now_Floor=5'b10001) )||
( ( (Slave_Floor16==5'b11000)||(Slave_Floor16==5'b10001)||(Slave_Floor16==5'b11001) )&&(Now_Floor=5'b10010) )||
( ( (Slave_Floor17==5'b11000)||(Slave_Floor17==5'b10001)||(Slave_Floor17==5'b11001) )&&(Now_Floor=5'b10011) )||
( (Slave_Floor18==5'b10001)&&(Now_Floor=5'b10100) )
)
大神们帮看看吧 这个有什么问题，我编译一直显示错误** Error: D:/studytool/modelsim/examples/elevator/EDAwork/Slave_Request_Arrive.v(65): near ")": Syntax error. Assignment sub-exprs. are only allowed in SystemVerilog or PSL.