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基于网络编码的多信源组播通信系统,包括源代码,原理图等

时间:11-08 来源:3721RD 点击:

rameter GEN_WIDTH = 8,

parameter REG_GRP_WIDTH = 12,

parameter SRC_GEN_SEQ_WIDTH = 24,

parameter DRAM_NUMS = 3,

parameter CAM_NUMS = 3,

parameter DRAM_NUMS_WIDTH = log2(DRAM_NUMS),

parameter CAM_NUMS_WIDTH = log2(CAM_NUMS),

parameter DRAM_BLOCK_WIDTH = 8,

parameter CAM_ADDR_WIDTH = 8,

parameter CMP_DATA_MASK = 12'hfff

)

(// --- cam interface

output [SRC_GEN_SEQ_WIDTH-1:0] cmp_data_0,

output reg [SRC_GEN_SEQ_WIDTH-1:0] cmp_data_mask_0,

input [CAM_ADDR_WIDTH-1:0] match_addr_0,

input match_0,

output [SRC_GEN_SEQ_WIDTH-1:0] cmp_data_1,

output reg [SRC_GEN_SEQ_WIDTH-1:0] cmp_data_mask_1,

input [CAM_ADDR_WIDTH-1:0] match_addr_1,

input match_1,

output [SRC_GEN_SEQ_WIDTH-1:0] cmp_data_2,

output reg [SRC_GEN_SEQ_WIDTH-1:0] cmp_data_mask_2,

input [CAM_ADDR_WIDTH-1:0] match_addr_2,

input match_2,

// ---DRAM control interface

output reg [DRAM_NUMS_WIDTH-1:0] port_num_rd,

output reg [DRAM_BLOCK_WIDTH-1:0] block_num_rd,

output reg addr_vld,

input rd_idle,

// ---input_arbiter interface

input cam_vld,

// ---decoder interface

output reg pkt_vld,

output reg [REG_GRP_WIDTH-1:0] pkt_dcoding,

output reg pkt_not_find,

output reg has_other_factor,

input [REG_GRP_WIDTH-1:0] pkt_need_src_gen,

input need_pkt_vld,

input decod_com,

// ---decoded reg grp interface

output reg rd_dcod_reg_req_1,

output [REG_GRP_WIDTH-1:0] rd_dcod_src_gen_1,

input req_ack_vld_1,

input alredy_decod_1,

// --- Misc

input rst_n,

input clk

);

function integer log2;

input integer number;

begin

log2=0;

while(2**log2<number) begin

log2=log2+1;

end

end

endfunction // log2

// ------------ Internal Params --------

parameter NUM_STATES = 4;

parameter IDLE = 4'b0;

parameter GET_SRC_GEN_NUM = 4'b0001;

parameter LOOK_UP_CAM = 4'b0010;

parameter GET_CMP_RESLT_FIRST = 4'b0011;

parameter GET_CMP_RESLT_SEC = 4'b0100;

parameter RD_DRAM_MAIN_STEP = 4'b0101;

parameter LUP_DCOD_FACTOR1_FIRST = 4'b0110;

parameter LUP_DCOD_FACTOR1_SEC = 4'b0111;

parameter GET_FACTOR1_RESLT = 4'b1000;

parameter RD_DRAM_MINOR_STEP = 4'b1001;

parameter LUP_DCOD_FACTOR2 = 4'b1011;

// ------------- Regs/ wires -----------

wire [SRC_WIDTH-1:0] src_num_plus1;

reg [SRC_WIDTH-1:0] src_num,src_num_sel,src_num_sel_next; //source sequence number for packets that is being decoded

reg [SRC_WIDTH-1:0] src_num_next;

wire [GEN_WIDTH-1:0] gen_num_plus1;

reg [GEN_WIDTH-1:0] gen_num,gen_num_sel,gen_num_sel_next; //generation sequence number for packets that is being decoded

reg [GEN_WIDTH-1:0] gen_num_next;

reg [CAM_NUMS-1:0] cam_lookup_reslt; // result of looking up packets in cam,stands for which cam finds the packet

reg [CAM_NUMS-1:0] cam_lookup_reslt_next;

reg[CAM_NUMS-1:0] cam_lookup_reslt_pre,cam_lookup_reslt_save;

reg[CAM_NUMS-1:0] cam_lookup_reslt_pre_next,cam_look

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