Freescale MC56F8257数字信号控制器开发方案

Freescale公司的MC56F825x/MC56F824x是基于56800E核的数字信号控制器(DSC),集成了DSP的处理功能和MCU功能以及灵活的丰富外设,便于创建高性价比的解决方案.60MHz时的性能为60MIPS,工作电压3.0V-3.6V,工作温度–40℃到+105 ℃,主要用于工业控制,家用电器,智能传感器,消防和安全系统,太阳能逆变器,电池充电和管理,开关电源和管理,马达控制,电表,手持电动工具,医疗设备,仪表和照明镇流器等.本文介绍了MC56F825x/MC56F824x主要特性,框图和56800E核框图, MC56F8257 Tower MCU模块TWR-56F8257主要特性,方框图,电路图和材料清单.

The MC56F825x/MC56F824x is a member of the 56800E core-based family of digital signal controllers (DSCs). It combines, on a single chip, the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals to create a cost-effective solution. Because of its low cost, configuration flexibility, and compact program code, it is well-suited for many applications. The MC56F825x/MC56F824x includes many peripherals that are especially useful for cost-sensitive applications, including:

• Industrial control

• Home appliances

• Smart sensors

• Fire and security systems

• Solar inverters

• Battery chargers and management

• Switched-mode power supplies and power management

• Power metering

• Motor control (ACIM, BLDC, PMSM, SR, and stepper)

• Handheld power tools

• Arc detection

• Medical devices/equipment

• Instrumentation

• Lighting ballast

The 56800E core is based on a modified Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The MCU-style programming model and optimized instruction set allow straightforward generation of efficient, compact DSP and control code. The instruction set is also highly efficient for C compilers to enable rapid development of optimized control applications.

The MC56F825x/MC56F824x supports program execution from internal memories. Two data operands per instruction cycle can be accessed from the on-chip data RAM. A full set of programmable peripherals supports various applications.

Each peripheral can be independently shut down to save power. Any pin, except Power pins and the Reset pin, can also be configured as General Purpose Input/Outputs (GPIOs).

On-chip features include:

• 60 MHz operation frequency

• DSP and MCU functionality in a unified, C-efficient architecture

• On-chip memory

– 56F8245/46: 48 KB (24K x 16) flash memory; 6 KB (3K x 16) unified data/program RAM

56F8247: 48 KB (24K x 16) flash memory; 8 KB (4K x 16) unified data/program RAM

– 56F8255/56/57: 64 KB (32K x 16) flash memory; 8 KB (4K x 16) unified data/program RAM

• eFlexPWM with up to 9 channels, including 6 channels with high (520 ps) resolution NanoEdge placement

• Two 8-channel, 12-bit analog-to-digital converters (ADCs) with dynamic x2 and x4 programmable amplifier, conversion time as short as 600 ns, and input current-injection protection

• Three analog comparators with integrated 5-bit DAC references

• Cyclic Redundancy Check (CRC) Generator

• Two high-speed queued serial communication interface (QSCI) modules with LIN slave functionality

• Queued serial peripheral interface (QSPI) module

• Two SMBus-compatible inter-integrated circuit (I2C) ports

• Freescale’s scalable controller area network (MSCAN) 2.0 A/B module

• Two 16-bit quad timers (2 x 4 16-bit timers)

• Computer operating properly (COP) watchdog module

• On-chip relaxation oscillator: 8 MHz (400 kHz at standby mode)

• Crystal/resonato