Freescale MC56F8257数字信号控制器开发方案

– Fractional delay for enhanced resolution of the PWM period and edge placement

– Arbitrary eFlexPWM edge placement - PWM phase shifting

– NanoEdge implementation: 520 ps PWM frequency resolution

— 3 Channel PWM with full Input Capture features

– Three PWM Channels - PWMA, PWMB, and PWMX

– Enhanced input capture functionality

— Support for synchronization to external hardware or other PWM

— Double buffered PWM registers

– Integral reload rates from 1 to 16

– Half cycle reload capability

— Multiple output trigger events can be generated per PWM cycle via hardware

— Support for double switching PWM outputs

— Up to four fault inputs can be assigned to control multiple PWM outputs

– Programmable filters for fault inputs

— Independently programmable PWM output polarity

— Individual software control for each PWM output

— All outputs can be programmed to change simultaneously via a FORCE_OUT event

— PWMX pin can optionally output a third PWM signal from each submodule

— Channels not used for PWM generation can be used for buffered output compare functions

— Channels not used for PWM generation can be used for input capture functions

— Enhanced dual edge capture functionality

— Option to supply the source for each complementary PWM signal pair from any of the following:

– Crossbar module outputs

– External ADC input, taking into account values set in ADC high and low limit registers

• Two independent 12-bit analog-to-digital converters (ADCs)

— 2 x 8 channel external inputs Built-in x1, x2, x4 programmable gain pre-amplifier

— Maximum ADC clock frequency: up to 10 MHz

– Single conversion time of 8.5 ADC clock cycles (8.5 x 100 ns = 850 ns)

– Additional conversion time of 6-ADC clock cycles (6 x 100 ns = 600 ns)

— Sequential, parallel, and independent scan mode

— First 8 samples have Offset, Limit and Zero-crossing calculation supported

— ADC conversions can be synchronized by eFlexPWM and timer modules via internal crossbar module

— Support for simultaneous and software triggering conversions

— Support for multi-triggering mode with a programmable number of conversions on each trigger

• Inter-module Crossbar Switch (XBAR)

— Programmable internal module connections among the eFlexPWM, ADCs, Quad Timers, 12-bit DAC, HSCMPs, and package pins

— User-defined input/output pins for PWM fault inputs, Timer input/output, ADC triggers, and Comparator outputs

• Three analog comparators (CMPs)

— Selectable input source includes external pins, internal DACs

Programmable output polarity

— Output can drive timer input, eFlexPWM fault input, eFlexPWM source, external pin output, and trigger ADCs

— Output falling and rising edge detection able to generate interrupts

— 32-tap programmable voltage reference per comparator

• One 12-bit digital-to-analog converter (12-bit DAC)

— 12-bit resolution

— Power down mode

— Output can be routed to internal comparator, or off chip

• Two four-channel 16-bit multi-purpose timer (TMR) modules

— Four independent 16-bit counter/timers with cascading capability per module

— Up to 120 MHz operating clock

— Each timer has capture and compare and quadrature decoder capability

— Up to 12 operating modes

— Four external inputs and two external outputs

• Two queued serial communication interface (QSCI) modules with LIN slave functionality

— Up to 120 MHz operating clock

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