biasing for maximum swing for LNA

Hi members
has anyone ever analyzed on how much Vgs is to be fixed for a MOSFET to obtain maximum "symmetrical" signal swing at the output for the inductive source degeneration LNA using a MOSFET?

I am trying to obtain input impedance match and simulatneously maximum signal swing....and am finding it very difficult to interpret the signal swing criterion.

I understand very well how to bias a simple discrete circuit single stage CS or CE amplifier. We draw AC and DC load lines and all but here I seem to have some difficulty if I use same approach of trying to plot the AC load line!

the DC loadline is just Vds=Vdd

atleast can some one throw some light on how to bias for maximum voltage and current swings while keeping mosfet in saturation!

cuz if one biases for maximum voltage and current swings thru the FET then one automatically obtains best design....


some one please help!

pleaseeee


no book ever deals with this aspect....all books only do analysis but never talk about biasing for signal swings for RF circuits!