lna input/output
I'm looking for the theory which explains how to match an LNA for IIP3. (IIP3 circles etc)
I know the common thumbruels (emmiter degeneration and bypass caps)
Can anyone provide an extensive writing on that subject ?
Thanks,
Yaniv
Hello yanivsa
I don't know of any good papers on this topic, but when you
design an LNA your focus is low noise. Now IP3 is related to
gain (non-linearity?s of the active device). A rule of thumb
is an Amp's IP3 is ~ 8-11 dB greater than its gain. So having
a lot of gain is good for IP3 (assuming no saturation...), it is
also good for an LNA (more LNA gain lowers the noise contribution
from the other devices in your line up). But having a good match
for gain may be a bad match for a low noise figure. So I would
create the noise circles and find a match for max gain and acceptable
noise figure.
Good luck
It all depends what you want. Actually, you can put a low frequency trap in the input of LNA, which will improve the IIP3 greatly and make the 9.6dB rule invalid. It includes an inductor > 1 uH and a cap in serial usually.
Hello yanivsa ,
1.You mentioned Rules of thumb: emitter generation and caps. Could you please explain what are exactly this rules?
2. I had to design a very low noise amp with high Ip3. I took the best devices for IP3 using Syscalc or other tools and also measured the noise parameters of the devices. Play with the parameters while looking between deferent devices
search the topic :
"Volterra series"
You can use this method to derive the whole equation of IM3 or IM2 of any circuit.
K.L.Feng(a student of R.G.Meyer) also used Volterra series to derive an IM3 eq. of C.E stage. But i haven't see anyone derive the IM2 eq. .... :P
It seems that Microwave office can do volterra series analyzation.
The best thing you can do when designing LNA's with high IP3 is just selecting a transistor with high DC current. I directly think of HEMTs as best choice, check this site out:
http://www.qsl.net/yu1aw/atf54143eng.htm