question of amplifier layout

hi all,i design a LNA ,after finish layout i put
footprint of amplifier as in datasheet,as u see in the picture,is
these modification change the s par.simulation,althougth i put them
after t.l. simulated(i put it random) that i know these elements reduce
coupling capacitor between the amplifier pins
pls for who design a real amp.
help me pls
regards

Can you give us more detail of your design, e.g. operating frequency?

From your layout, I guess you are using FET and the amplifier operates at very high frequency, because the radial stub in the design are very small. If so, I think the coupling in-between the layour shoud be considered. Did you also include the ground via effect in your design?

yes,all u say right,i use ground with via,my operating freq=10 ghz

are you doing your design in PCB? from my experience, design above 5GHz should use EM simulator. The coupling and parasitic effect in between the layout will make your schematic simulation to fail.

hi i use ads2003,using substrate 6.15 ,these coupling not appear at design
i simulate at 10 ghz
regards