Digital lock detector of PLL?
时间：04-11
整理：3721RD
点击：
Anyone has designed the digital lock detector?
I wander how to write a specification of it? Since my fref and fvco both are 5 MHz, how to impliment it? It seems very simple, however, after think it twice, it is very hard to design, isn't it?
I wander how to write a specification of it? Since my fref and fvco both are 5 MHz, how to impliment it? It seems very simple, however, after think it twice, it is very hard to design, isn't it?