lna reverse isolation

I have designed an LNA in the 0.25um CMOS process, and I am simulating it in Spectre RF. I am aiming for a reverse Isolation (S12) of -40dB, but all I am getting now is -30dB.
What are the factors on which reverse isolation depends? How can I improve it? I am using the Inductively degenerated Common Source topology with a Cascode.

Try using two stages. Also try using a double cascode. That is put a second common gate transistor stage on top of the one now included.

The other factor that your simulator may not include is the layout effects. There will be electric and magnetic coupling around your circuit which may have a detrimental effect for you.

Most would be quite happy with 30 dB per stage. Use multiple stages if more is needed, but on a monolithic chip, do not expect a miracle due to ground plane parasitic inductance.

What is the operation frequency? Above 5GHz?

-30dB is generally enough for most transceiver cases. Assuming the LO power is 0dBm, the RF-LO isolation is -30, so that the LO to LNA input isolation is (-30) + (-30) = -60 and the LO power at LNA input is -60dBm. And band filter gives extra attenutaion. For direct-down receiver, this problem is more serious because it causes co-channel interference.

And, did you consider the parasitics?