How to amplify a clipped sin TCXO?
What is the best way to amplify a clipped sin TCXO? (Op amp? BJT? take into
account that we are talking on large signal 0.7Vpp and BW).
If anyone has some material about this please share it with me and the forum.
Best Regards.
Can anyone tell me please where can I find information, application notes or anything that helps to understand about clipped sine...
Regards,
Well....the board over the last few months has been getting some ludicrous questions, like" how to build a high energy gun", "my PLL is broken, what does that mean", etc! You question is somewhat incomplete, so posters may not be eager to respond if they do not know what you are asking about. Specifically, you do not mention the frequency of operation, which is a key bit of info needed to craft an answer. Posters should post as much info as possible about their problem, and they will get better responses--especially if English is a 2nd language and it might not be that clear what you are asking.
I will guess that you are talking about low frequency oscillation, and give you a suggestion. AC couple an ACT cmos gate, like a hex inverter, to the oscillator. You AC couple with a series capacitor between oscillator output and gate input, in parallel with a resistive divider DC level set. The resistive divider is 1K between power supply and gate input, and another 1K between gate input and ground. You can probably get a 3 V p-p swing at the gate output.
Thanks for the Advice and I should add more information regarding my application.
My goal is to improve the phase noise of a PLL and this can be done using TCXO
with a clipped sine waveform. The clipped sine in the spectral domain contains
several harmonics (My TCXO is 40 MHz clipped sine).
I want to amplify the amplitude of this Clipped sine waveform and I woundered
how to do it (the amplitude I have right now is 0.5 Vp-p on 0.5V DC) and I need
0.8 Vp-p amplitude.+
Regarding the question "how to do it" :
1. Using operational amplifier? (Take into account that the GBW of the amplifier is limited)
2. Using a Common collector amplifier (Buffer)?
3. How can we eliminate the Return of the Other Harmonics? (suppose that the
Clipped sine consist of 20 Harmonics at the multiply of 40 MHz and I'm using
coaxial cable to connect the Output of the Buffer to a CLK input with 10 Kohm + 10 pF input impedance => some harmonics will return so how can I eliminate it ?
I can't put a serial 10 Kohm resistor since 1mA current will destroy the signal).
Thank you.
Phase noise for a 74ACT04 hex inverter is probably -155 dBc/Hz from 1 khz and up offsets. That is not good enough? If you are using a digital PLL chip, that is probably better than the clock input pin's phase noise, which you are probably going to divide down further.