resister averaging in flash adc
时间:04-10
整理:3721RD
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hi all ,
i want to desing the 1gs/s 6 bit flash adc.
for this i need the resister averaging method to reduce my DNL .
i am unable to understand how the resister network connected between the output of preamp will reduce the dnl.
if u have any thesis/links/docs to understand the basic fundamental of resister averaging .
plz help.
regards
manish
i want to desing the 1gs/s 6 bit flash adc.
for this i need the resister averaging method to reduce my DNL .
i am unable to understand how the resister network connected between the output of preamp will reduce the dnl.
if u have any thesis/links/docs to understand the basic fundamental of resister averaging .
plz help.
regards
manish
Are you referring to Abidi's IEEE paper to design this flash ADC? I remember he published a CMOS Flash ADC with resistive averaging.
