Dielectric Resonator Oscillator layout (DRO)
时间：04-09
整理：3721RD
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Hi
I want to sketch the layout of the DRO_Oscillator (one of AWR example). I have two problems with this design:
1- This design has two inductor with the value of 100 nH and a capacitor with the value of 100 pf. What can I layout these elements?
2- I don't know how I can layout the dielectric? (Is it an offchip element?)
The DRO design is attached below:
I want to sketch the layout of the DRO_Oscillator (one of AWR example). I have two problems with this design:
1- This design has two inductor with the value of 100 nH and a capacitor with the value of 100 pf. What can I layout these elements?
2- I don't know how I can layout the dielectric? (Is it an offchip element?)
The DRO design is attached below:
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