need help on lna with darlington structure

i am design a lna which need 20dBm P1dB and 35dBm IIP3, someone told that darlington maybe a selection, but i have not seen any books that refers details about how to design a darlington-structre lna, does anyone have some detailed materials about darlington structre lna design? thanks!

Hi, There are some papers about that. first choose your bandwith, and then papers.
Review that one.

http://ieeexplore.ieee.org/iel4/75/1...rnumber=481855

Book: LNA-codesign for fully integrated CMOS wireless receivers, by paul leroux

Cheers

I don?t think that Darlington could make bigger difference improving the IP3 compared to a single stage LNA.
For these kind of high IP3 requirements (usually CATV LNA?s) good approach is a differential or a push-pull stage LNA.
Also for this design very important are the characteristics of the transistor.

-IIP3 can not be 10dB more than P1dB ( practically)
-Higher IP3 LNA's have cascode structures..
-Darlington topology is not a suitable configuration for an LNA because of multipled CBE through the input..

IP3 can easily be much more that 10 dB higher that P1dB point. You may check for example RFMD amplifiers, there are some with 18 or even 19dB difference.

If you need CATV amplifier you may use BPF540 single transistor amplifier and get your spec. If price is not a main concern use gain blocks from RFMD, Minicircuits, WJ and other vendors. You may get ready to go amplifier with internal biasing and matching for 75 Ohm, stable and with layout.

Darlington is not good for LNA and for high linearity as well.

BFP540 cannot be use for this design, which is looking for 20dBm P1dB and 35dB IIP3.
BFP540 has only 11dBm P1dB, and max 24.5dBm OIP3.

http://www.datasheetcatalog.org/data...1-bfp540_1.pdf

As I mentioned before, you have carefully to chouse the transistor and after that the topology. This is a really tough spec for an LNA.

If IP3 is 10dB higher than P1dB (which is possible) there is a problem with that LNA (most frequently, potential instability out-of-band especially at low frequencies).

BFP540 has IP3=24.5 dBm for 2V and 20 mA (page 3 of data sheet). On page 6 plots for IP3 clearly show that for 5V and 40mA IP3 goes up to about 30dBm. If this is not enough BFP650 can be used. Data sheet shows IP3=29.5 for 3V@80mA and close to 33dBm for 45V@45mA. These numbers are pretty much conservative. Actual numbers are better. I did designs based on these transistors and had IP3 of 39 ? 40 dBm.
By the way, I was very surprised when discover that S-parameter files for these transistors on Infineon web site are corrupted and wrong. Even after serious surgery these files still work just so-so because they have no noise parameters. After I found S-parameter files in my simulation program LINC2 S-data directory everything became good. Shame on Infineon. It is the first time when I see something wrong on Germany Company. Usually Germans are very accurate. If you need good S-parameter file please let me know. I can upload them for you.

At 45V any SiGe transistor will burn in the first second

Anyway I think here is a confusion. The initial requirement is looking for 35dBm IIP3 (IP3 AT THE INPUT) which probably means at least 50dBm OIP3 (IP3 AT THE OUTPUT).
None of the BFP series can make this as a stand alone device. Needs a particular configuration.[/quote]

Yes, at 45V it will burn. Of course this is a typo and actual number is 4.5V.