simulated the parasitic capacitance value at source in communtating MOS.

Dear all,

I design a passive mixer now. I need to simulate the corresponding input RF loading which will be used in my partner side. He uses this loading as his circuit output loading for designing.

Now, I need to simulate the corresponding capacitance see into the source of the MOS in the communtating stage. As you know that the gate of the MOS will be connected to LO signal. Because of this connection, how could I simulate the correct corresponding input capacitance? The communtating MOS is ON/OFF regularly because of LO.

Thanks,

wccheng