How to take ESD and pad capacitances into consideration during design

Hi, If I want to take Capacitance effects of ESD and bond pad in the design. Where should I connect these capacitances, at every pin in the schematic?. Also, Where exactly ESD protection circuit is connected, only at the input?

Thanks

Connect them to ground, it is enough. ESD is normally at the direct input of the chip and builded into the pad between input & VDD/VSS, sometimes secondary ESD is implemented at the gates which are connected to pins and very sensitive. I am not an expert, but high frequency ESD model (I guess you need this) is capacitance to ground on circuit inputs. I wouldn't overthink it when the focus is on other circuit's design.