oscillator simulation in ADS
try common base configuration. For the bias, in @DS 2003A, there is a design guide. You can also use AppliCAD, it also from agilent, free to calculate all the resistors. then use DC simulation in @DS to check the bias curent.
you can use the design guide in 03A.
Dear zeshan102
The results you can get using S parameters to design oscillators are poor, although they can be used for the first step of the design. This is because the S parameters are linear and small signal parameters by nature. In contrast the behavior that describe an oscillator is nonlinear and large signal based.
To design your VCO you would be better of using a device characterized through nonlinear models. NEC (www.cel.com) has some parts nonlinearly characterized that you could try.
You can start your design using a linear two port approach where you break the oscillator in an amplifier section cascaded with the feedback network by opening the feedback path. Optimize S21, mag and angle, to have a positive feedback defined. After this step you should close the loop and go for an oscillator's nonlinear analysis and optimization.
I hope this help you somehow.
NandoPG
The to test the oscilator, just look at the S11 and S22 first, both of them should be > 1 at the oscilating frequency. Then look at the input impedance, the real part must be nagative. Then you circuit has some potiential to oscilate. then bring it into HB simulation, put the resonator at the input port. then test it, if those conditions above are satisfied, there sould be no problem. To make S11 and S22 > common gate with feedback is the best but you will get a lot of phase noise. I recommend NE42484A for the active device. very low noise and there is a model in @DS. To test the resonator, i recommend to test it with a newwork analyzer then bring it into the @DS
Dear Boy,
In spite of the negative resistance approach to design and analyze oscillators is popular, that is not the best one. This approach fails....
....to guarantee the start up conditions. A negative resistance at the input terminal doesn't means your oscillator will necessarily start up. You need to analyze S21 in open loop instead.
...to predict the loaded Q of the resonator used and so to estimate the phase noise. The loaded Q is readily available analyzing the group delay of S21 in open loop.
If you try to use the open loop approach instead of the negative resistance approach you will get an oscillator with a reasonable agreement with your simulations.
NandoPG
Daer nandopg
Could you please give me the detail on open loop design? I understand the negative resistance but I dont have much knoeledge on open loop test. From my understanding, the open loop mean the oscilator without a resonator. is this true? Could you please clearify? I always think that the oscilator is an infinite gain amplifier with possitive feedfack via a resonator. Is that true? Thus, when I simulate the oscilator , i test S21 of the openloop (in fact, a transister with a resonator at the input port) then I look at the S21 plot in polar form (Nyquist plot I think), if the magnitude of S21 > 1 and the phase = 0 i.e. the S21 trajectory cut the possitive real axis, It should be find, and go ahead put a feedback and see in HB whether it oscllitate or not. However, as I try many times, The phase of S21 does not have to be 0 at the osclilation frequency, but it still osclilate in HB. I realy dont know why this happend. I have read Rhea book but I never got the nice result as in his book. That why I go with negative resiatance with proper load design so that the loaded-Q will not effect the oscilation.
I have a question too, in the Rhea's book, he shows only the open loop for common emitter. how can i transform the common base to a open loop equivalent circuit?
Sorry for many post but this thinf just hit me, May I may a conclusion like this.
1. Find the input impedance WITH a positive feedback and WITHOUT a resonator. The feasible fequency range of oscilation is that the frequency range that the negative resistance occures.
2. Look at the S11 and S22, both S11 and S22 have to > 1 in that frequency range then it will be oscilate within the intersection of these frequency range.
3. Put the resonator which resonate in that frequency range in to tune to a desire frequency.
I dont know my conclusion is possible or not. I think the the condition on S11 and S22 will take care of the open loop gain.
Dear Boy,
When I talk about open loop analysis, I am talking about to cascade the active device itself with the resonator is being used in the oscillator. To properly open the loop you have to identify, looking at the oscillator topology you are using, what element is coupling signal to the input of the active device. For example regard the topology Cser - Lshu - Cshu - Cser. If you assume that the first Cser is connected to the input of the active device and the last Cser is connected to the output of the active device, you have defined a feedback structure. To check if this structure will oscillate or not you have first to open one of the Cser from the active device terminal. This operation results in a circuit composed by the topology described above cascaded with the active device. Analyzing the mag and ang of S21 using the open loop circuit described you can see if your circuit will oscillate or no when the loop is closed. If the phase of the S21 cross the 0deg at the same time the mag of S21 pass to a maximum and if the mag of S21 is greater than 0dB (typically 5 to 10dB), the closed loop circuit will oscillate at the frequency where the zero crossing happens.
The beauty of this approach is that you can use any topology for the active device you want as well as any topology for the resonator. You can adjust for example emitter or base capacitance to ground to force the zero crossing of the ang curve to be at the same frequency as the maximum of the S21 mag curve. Also a loaded Q of the resonator can be derived and applied to the Leeson's equation to predict the phase noise.
The book from Rhea is a very good reference. If you read this book carefully you will find out lots of good information.
NandoPG
Dear Nanopg
My problem is how can I set up the open loop from the exising close loop circuit. Let say for example a basic colpitt oscillor. In the Rhea book he give an example on a colpitts with collector output. how can I get the open loop for a colpitt with emitter output.
Dear Boy,
Lets assume the very basic Colpitts topology connected to a transistor. In this topology you have:
Cap between base and emitter
Cap between collector and emitter
Ind between collector and base
If you want a RF ground at base and to take the output from emitter, your open loop network is:
Collector - L to ground
Collector - C to Input port
Base - RF grounded though a Cap
Emitter - C to ground
Emitter - To output port.
The topology above describe a open loop two port network corresponding to a Colpitts oscillator with the output taken from the transistor's emitter.
Performing the analysis of S21 for this kind of configuration you may find that changing the Cap that is grounding the base you get to displace the phase curve to get the zero crossing at the maximum of the S21.
Try this approach and let me know your achievements.
NandoPG
Yes, I got it, thank you very much, I also try a trsmisstion line resonator. NOw I know how to reduce the harmornic my using you approach since the transmisstion line and and odd reentry mode I just make sure that S21 at those frequency less than 1. I got a very good sine wave output even for 10 GHz. I feel a lot better know :) Thank again for a good tip. I may try to characterize the most commom oscilators in RF into open loop configuration. If I have done, may I sent it to u to verify.
nandopg,
at microwave frequency, many people use common source/gate inductive feedback. in such circuit there is no clear feedback path. how do we define the open loop?
Dear Cray,
There is an article: "Analysis Method Characterizes Microwave Oscillators" by S. Alechno published on November 1997 to February 1998 in 04 parts that, among other things, describes a method that make possible to analyze negative resistance oscillators though the two port open loop approach. I tried to find this articles in my papers to post here but my things are so messed up that I could not find them (if somebody get them please post here).
In short the method can be outlined as follows:
1- At the original negative resistance oscillator circuit (including he load) all original grounds should be connected together through a "wire". Remove all original ground symbols.
2- A new ground reference should be placed at emitter (or source) terminal of the new circuit.
3- Now open the circuit at the collector (or drain). This way you get a two port network. An Output port should be connected to the collector (or drain) and an Input port should be placed to the other side. This new circuit is analyzed through the open loop approach.
By using this technique you will be able to optimize a negative resistance oscillator through a open loop two port approach and keep under control all important VCO's parameters.
NandoPG
I have try the open loop method with 9 GHz common gate problem. It work fine. This link is an oscillator article from Stan Alechno but it is not in that series. This one is his newest one. I cound not find the old one (1997-1998) in pdf format.
http://xxx.mwrf.com/Articles/Index.c...&extension=pdf
I have a comment on openloop. I dont think i will work with any series feedback scheme since we cannnot break the loop in that case. The example is, the oscilator with an inductor connect to gate and gnd. we use this inductor as a feed back element in order to make the device unstable. but this kind of feedback is series. I dont think we can use openloop to analy this scheme. any comment?
Dear Cray,
Thia may help you. I just made it. :D
dear nandopg, boy and all
that's what i meant in my previous post. i think there isn't anyway we can find the open loop characteristic, as the feedback was cause by the transistor internal component and parasitic. the only way we can analyse this type of circuit is by negative resistance analysis.
to boy, having external feedback for 9GHz oscillator was a pain, unless u are designing a mmic oscillator where the lumped component can be realised.
for negative resistance analysis, as was mentioned by nandopg
>In spite of the negative resistance approach to design and analyze oscillators is popular, that is not the best one. This approach fails....
under what circumstances does the negative resistance approach fail?
>....to guarantee the start up conditions. A negative resistance at the input terminal doesn't means your oscillator will necessarily start up. You need to analyze S21 in open loop instead.
why a negative resitance at the input terminal doesn't mean the oscillator will start up? isn't the startup can trigger by surrounding noise?
>...to predict the loaded Q of the resonator used and so to estimate the phase noise. The loaded Q is readily available analyzing the group delay of S21 in open loop.
how to find loaded Q from group delay of S21?
>If you try to use the open loop approach instead of the negative resistance approach you will get an oscillator with a reasonable agreement with your simulations.
what simulation to u use to compare with ur measured result? transient or harmonic balance?
thanks for the help
cray
Also in ADS, very often i get this error msg.
internal timestep XXX too small at time YYYY
when running transient simulation for oscillator. how to solve the problem?
thanks
cray
oscillator simulation ADS 相关文章：