TCXO output for low phase noise

Hi, I want to design a low phase noise PLL based oscillator. I am going to select TCXO but I must choose between output types of TCXOs. Which one I should prefer, clipped sine, CMOS or TTL?

Thanx.

Technically speaking, a clipped sine wave output is capable of better phase noise than a cmos or "TTL" output. So if you are buying a very expensive TCXO and trying to make the best PLL possible, that would be the way to go.

In most cases, though, it will not make a difference. If you are using a modern PLL chip, the very first thing the clock sees is a cmos gate, so if the TCXO had better noise floor than that, it will immediately get degraded by that gate. So in that case I would propbably go with a cmos output.

If you were using an analog phase detector, and some fancy low phase noise dividers (like regenerative), then go with sine wave.

It all depends on what phase noise you are trying to achieve.

Rich

Thank you. I will decide after I get quotation.

---------- Post added at 15:45 ---------- Previous post was at 15:17 ----------

Actually in the ordering of TCXO it says that there is also an option with no tuning. Does this mean that there is no frequency error, i.e if I want 10.00000 MHz will they send me exactly this or will there be some frequency error?

There is always an error! You can tune some with a screwdriver adjust, and others with a tuning voltage. The non tunable type, they will guarantee a frequency accuracy it will be within.

They are referring to pulling of the TCXO by variation in output loading. To assure you are within the frequency make tolerance specification of the TCXO you should be close to the manf. recommended termination impedance. You can also examine the spec for pulling vs. termination information.

Most synthesizer designs today use fractional-N scheme to digitally adjust offset for TCXO frequency make tolerance. Besides make tolerance there is also aging drift.

The best way to maintain low phase noise is to get to a CMOS swing as soon as possible assuming you are dealing with single ended signal driving a CMOS synthesizer. The CMOS input buffer design is critical to prevent power supply and device noise from degrading SBN.

Clipped sinewave output is usually used as output to reduce harmonic spurious emissions.

Thank you for your recommendations