微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 微电子和IC设计 > IC后端设计交流 > RTL代码中例化了pad,时序出现了简单的warning

RTL代码中例化了pad,时序出现了简单的warning

时间:10-02 整理:3721RD 点击:
我在RTL代码中加入了pad的例化语句,用的是smic.18的工艺,如下
PLBI16N PAD_IN_a(.P(a), .D(top_a), .A(), .CONOF(1'b0), .SONOF(1'b1), .NEN(1'b0), .PEN(1'b0), .PD(1'b0), .PU(1'b1));
PLBI16N PAD_OUT_b(.P(b), .D(), .A(top_b), .CONOF(1'b0), .SONOF(1'b0), .NEN(1'b1), .PEN(1'b1), .PD(1'b1), .PU(1'b0));
PLBI16N PAD_IN_c(.P(c), .D(top_c), .A(), .CONOF(1'b0), .SONOF(1'b1), .NEN(1'b0), .PEN(1'b0), .PD(1'b0), .PU(1'b1));
PLBI16N PAD_OUT_e(.P(e), .D(), .A(top_e), .CONOF(1'b0), .SONOF(1'b0), .NEN(1'b1), .PEN(1'b1), .PD(1'b1), .PU(1'b0));
PLBI16N PAD_IN_clk_sys(.P(clk_sys), .D(top_clk_sys), .A(), .CONOF(1'b0), .SONOF(1'b1), .NEN(1'b0), .PEN(1'b0), .PD(1'b0), .PU(1'b1));
PLBI16N PAD_IN_clk_i2c(.P(clk_i2c), .D(top_clk_i2c), .A(), .CONOF(1'b0), .SONOF(1'b1), .NEN(1'b0), .PEN(1'b0), .PD(1'b0), .PU(1'b1));
endmodule
k_i2c), .A(), .CONOF(1'b0), .SONOF(1'b1), .NEN(1'b0), .PEN(1'b0), .PD(1'b0), .PU(1'b1));

综合后,就出现了timing warning:
rc:/> report timing -lint
============================================================
Generated by:Encounter(R) RTL Compiler RC10.1.306 - v10.10-s357_1
Generated on:Apr 30 201502:55:52 pm
Module:clk_test
Technology libraries:smic18_ll_tt 0.1
smic18IO_ll_line_tt 2.0
Operating conditions:TYPICAL (balanced_tree)
Wireload mode:top
Area mode:timing library
============================================================
-------------------------------------------------------------------------------
The following sequential clock pins have no clock waveform driving them.No
timing constraints will be derived for paths leading to or from these pins.
/designs/clk_test/instances_hier/ini_clk1/instances_hier/ini_clk1/instances_seq/b1_reg/pins_in/CK
/designs/clk_test/instances_hier/ini_clk1/instances_hier/ini_clk1/instances_seq/b2_reg/pins_in/CK
/designs/clk_test/instances_hier/ini_clk1/instances_hier/ini_clk1/instances_seq/b_reg/pins_in/CK
... 1 other warning in this category.
Use the -verbose option for more details.
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
The following timing exceptions are not currently affecting timing in the
design.Either no paths in the design satisfy the exception's path
specification, or all paths that satisfy the path specification also satisfy an
exception with a higher priority.You can improve runtime and memory usage by
removing these exceptions if they are not truly needed.To see if there is a
path in the design that satisfies the path specification for an exception, or
to see what other exception is overriding an exception because of priority, use
the command:
report timing -paths [eval [get_attribute paths <exception>]]
/designs/clk_test/timing/exceptions/multi_cycles/mc_1
/designs/clk_test/timing/exceptions/path_disables/dis_1
-------------------------------------------------------------------------------
说clock pins没有驱动?这是为什么呢?是不是跟我pad的例化有关系?求大牛解答

sdc怎么写的, 这个-lint是不是和pt的 check_timing 一个意思?
感觉和pad例化没啥关系,clk是从pad port进来的么

问题已经解决了,是为代码写的有问题,clk写成lk了!

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top