求助。lvs报错了，如何修改？、、
时间：10-02
整理：3721RD
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CELL COMPARISON RESULTS
#######################
# ###
##INCORRECT#
# ###
#######################
Error:Different numbers of nets (see below).
Error:Connectivity errors.
Warning:Extra ports in layout.
LAYOUT CELL NAME:AN2D1BWP12THVT
SOURCE CELL NAME:AN2D1BWP12THVT
--------------------------------------------------------------------------------------------------------------
INITIAL NUMBERS OF OBJECTS
--------------------------
LayoutSourceComponent Type
--------------------------
Ports:75*
Nets:97*
Instances:33MN (4 pins)
33MP (4 pins)
------------
Total Inst:66
NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
LayoutSourceComponent Type
--------------------------
Ports:75*
Nets:86*
Instances:11_invv (4 pins)
11_nand2v (5 pins)
------------
Total Inst:22
* = Number of objects in layout different from number in source.
**************************************************************************************************************
INCORRECT OBJECTS
**************************************************************************************************************
LEGEND:
-------
ne= Naming Error (same layout name found in source
circuit, but object was matched otherwise).
**************************************************************************************************************
INCORRECT NETS
DISC#LAYOUT NAMESOURCE NAME
**************************************************************************************************************
1Net 9** no similar net **
--------------------------------------------------------------------------------------------------------------
2Net 10** no similar net **
**************************************************************************************************************
INCORRECT INSTANCES
DISC#LAYOUT NAMESOURCE NAME
**************************************************************************************************************
3M5(0.620,0.880)MP(PCH_HVT)M_u3-M_u3MP(PCH_HVT)
g: 12g: net6
s: Zs: Z
d: VDDd: VDD
b: 10** no similar net **
** VDD **b: VDD
--------------------------------------------------------------------------------------------------------------
4M2(0.620,0.180)MN(NCH_HVT)M_u3-M_u2MN(NCH_HVT)
g: 12g: net6
s: Zs: Z
d: VSSd: VSS
b: 9** no similar net **
** VSS **b: VSS
--------------------------------------------------------------------------------------------------------------
5M1(0.380,0.180)MN(NCH_HVT)M_u2-M_u4MN(NCH_HVT)
g: A2g: A2
d: 12** net6 **
b: 9** no similar net **
** VSS **d: VSS
** VSS **b: VSS
--------------------------------------------------------------------------------------------------------------
6M0(0.180,0.180)MN(NCH_HVT)M_u2-M_u3MN(NCH_HVT)
g: A1g: A1
d: VSSb: VSS
b: 9** no similar net **
** 12 **d: net6
--------------------------------------------------------------------------------------------------------------
7M4(0.380,1.190)MP(PCH_HVT)M_u2-M_u2MP(PCH_HVT)
g: A2g: A2
s: 12s: net6
d: VDDd: VDD
b: 10** no similar net **
** VDD **b: VDD
--------------------------------------------------------------------------------------------------------------
8M3(0.180,1.190)MP(PCH_HVT)M_u2-M_u1MP(PCH_HVT)
g: A1g: A1
s: 12s: net6
d: VDDd: VDD
b: 10** no similar net **
** VDD **b: VDD
**************************************************************************************************************
INFORMATION AND WARNINGS
**************************************************************************************************************
MatchedMatchedUnmatchedUnmatchedComponent
LayoutSourceLayoutSourceType
-----------------------------------------
Ports:5520
Nets:6620
Instances:1100_invv
1100_nand2v
--------------------------------
Total Inst:2200
o Extra Ports in Layout:
9 10
o Initial Correspondence Points:
Ports:VDD VSS Z A1 A2
CELL COMPARISON RESULTS
#######################
# ###
##INCORRECT#
# ###
#######################
Error:Different numbers of nets (see below).
Error:Connectivity errors.
Warning:Extra ports in layout.
LAYOUT CELL NAME:AN3XD1BWP12THVT
SOURCE CELL NAME:AN3XD1BWP12THVT
--------------------------------------------------------------------------------------------------------------
INITIAL NUMBERS OF OBJECTS
--------------------------
LayoutSourceComponent Type
--------------------------
Ports:86*
Nets:119*
Instances:44MN (4 pins)
44MP (4 pins)
------------
Total Inst:88
NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
LayoutSourceComponent Type
--------------------------
Ports:86*
Nets:97*
Instances:11_invv (4 pins)
11_nand3v (6 pins)
------------
Total Inst:22
* = Number of objects in layout different from number in source.
**************************************************************************************************************
INCORRECT OBJECTS
**************************************************************************************************************
LEGEND:
-------
ne= Naming Error (same layout name found in source
circuit, but object was matched otherwise).
**************************************************************************************************************
INCORRECT NETS
DISC#LAYOUT NAMESOURCE NAME
**************************************************************************************************************
1Net 10** no similar net **
--------------------------------------------------------------------------------------------------------------
2Net 11** no similar net **
**************************************************************************************************************
INCORRECT INSTANCES
DISC#LAYOUT NAMESOURCE NAME
**************************************************************************************************************
3M7(0.760,0.880)MP(PCH_HVT)M_u3-M_u3MP(PCH_HVT)
g: 13g: net7
s: Zs: Z
d: VDDd: VDD
b: 11** no similar net **
** VDD **b: VDD
--------------------------------------------------------------------------------------------------------------
4M3(0.760,0.180)MN(NCH_HVT)M_u3-M_u2MN(NCH_HVT)
g: 13g: net7
s: Zs: Z
d: VSSd: VSS
b: 10** no similar net **
** VSS **b: VSS
--------------------------------------------------------------------------------------------------------------
5M2(0.520,0.180)MN(NCH_HVT)M_u4-M_u6MN(NCH_HVT)
g: A3g: A3
d: 13** net7 **
b: 10** no similar net **
** VSS **d: VSS
** VSS **b: VSS
--------------------------------------------------------------------------------------------------------------
6M0(0.160,0.180)MN(NCH_HVT)M_u4-M_u4MN(NCH_HVT)
g: A1g: A1
d: VSSb: VSS
b: 10** no similar net **
--------------------------------------------------------------------------------------------------------------
7M1(0.340,0.180)MN(NCH_HVT)M_u4-M_u5MN(NCH_HVT)
g: A2g: A2
b: 10** no similar net **
** 13 **d: net7
** VSS **b: VSS
--------------------------------------------------------------------------------------------------------------
8M6(0.520,1.070)MP(PCH_HVT)M_u4-M_u3MP(PCH_HVT)
g: A3g: A3
s: 13s: net7
d: VDDd: VDD
b: 11** no similar net **
** VDD **b: VDD
--------------------------------------------------------------------------------------------------------------
9M4(0.160,1.070)MP(PCH_HVT)M_u4-M_u1MP(PCH_HVT)
g: A1g: A1
s: 13s: net7
d: VDDd: VDD
b: 11** no similar net **
** VDD **b: VDD
--------------------------------------------------------------------------------------------------------------
10M5(0.340,1.070)MP(PCH_HVT)M_u4-M_u2MP(PCH_HVT)
g: A2g: A2
s: 13s: net7
d: VDDd: VDD
b: 11** no similar net **
** VDD **b: VDD
**************************************************************************************************************
INFORMATION AND WARNINGS
**************************************************************************************************************
MatchedMatchedUnmatchedUnmatchedComponent
LayoutSourceLayoutSourceType
-----------------------------------------
Ports:6620
Nets:7720
Instances:1100_invv
1100_nand3v
--------------------------------
Total Inst:2200
o Extra Ports in Layout:
10 11
o Initial Correspondence Points:
Ports:VDD VSS Z A1 A2 A3
CELL COMPARISON RESULTS
#######################
# ###
##INCORRECT#
# ###
#######################
Error:Different numbers of nets (see below).
Error:Connectivity errors.
Warning:Extra ports in layout.
LAYOUT CELL NAME:AO21D1BWP12THVT
SOURCE CELL NAME:AO21D1BWP12THVT
--------------------------------------------------------------------------------------------------------------
INITIAL NUMBERS OF OBJECTS
--------------------------
LayoutSourceComponent Type
--------------------------
Ports:86*
Nets:119*
Instances:44MN (4 pins)
44MP (4 pins)
------------
Total Inst:88
NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
LayoutSourceComponent Type
--------------------------
Ports:86*
Nets:97*
Instances:11MN (4 pins)
11SPUP_2_1 (4 pins)
11_invv (4 pins)
11_smn2v (4 pins)
------------
Total Inst:44
* = Number of objects in layout different from number in source.
**************************************************************************************************************
INCORRECT OBJECTS
**************************************************************************************************************
LEGEND:
-------
ne= Naming Error (same layout name found in source
circuit, but object was matched otherwise).
**************************************************************************************************************
INCORRECT NETS
DISC#LAYOUT NAMESOURCE NAME
**************************************************************************************************************
1Net VSSVSS
10
--------------------------------------------------------------------------------------------------------------
2Net 11** missing net **
**************************************************************************************************************
INCORRECT INSTANCES
DISC#LAYOUT NAMESOURCE NAME
**************************************************************************************************************
3M7(0.780,0.880)MP(PCH_HVT)MI8-M_u3MP(PCH_HVT)
g: 14g: net59
s: Zs: Z
d: VDDd: VDD
b: 11** missing net **
** VDD **b: VDD
--------------------------------------------------------------------------------------------------------------
4M4(0.160,0.880)MP(PCH_HVT)M_u4MP(PCH_HVT)
g: A2g: A2
b: 11** missing net **
** VDD **b: VDD
--------------------------------------------------------------------------------------------------------------
5M5(0.340,0.880)MP(PCH_HVT)M_u3MP(PCH_HVT)
g: A1g: A1
b: 11** missing net **
** VDD **b: VDD
--------------------------------------------------------------------------------------------------------------
6M6(0.540,0.880)MP(PCH_HVT)M_u2MP(PCH_HVT)
g: Bg: B
b: 11** missing net **
** VDD **b: VDD
**************************************************************************************************************
INFORMATION AND WARNINGS
**************************************************************************************************************
MatchedMatchedUnmatchedUnmatchedComponent
LayoutSourceLayoutSourceType
-----------------------------------------
Ports:7610
Nets:8710
Instances:1100MN(NCH_HVT)
1100SPUP_2_1
1100_invv
1100_smn2v
--------------------------------
Total Inst:4400
o Extra Ports in Layout:
11
o Initial Correspondence Points:
Ports:VDD VSS Z A2 A1 B
没加tap cell，
tapless的cell 单独做lvs过不了的， well没有正确的偏置
没加tap cell，
tapless的cell 单独做lvs过不了的， well没有正确的偏置
我按小编说的找了，tap cell用哪个cell呢?应该是filler cell 吧?
就叫tapcellxxx吧， tsmc 多少nm的库?
那些问题都消除了，现在有一些错，但是不多，erc也过了。
5M1(0.380,0.180)MN(NCH_HVT)M_u2-M_u4MN(NCH_HVT)
g: A2g: A2
d: 12** net6 **
b: 9** no similar net **
** VSS **d: VSS
** VSS **b: VSS
==>N管衬底没接好。
怎样设置sroute布线后core里横向的电源线都布线在M3层上呢。试了很多次都不行，要么没布上要么还是老样子。
sroute -layer不行么，或者把m2 选中，改成m3 行么，不过就是drop via麻烦，
只有layerChangeRange { toplayernumbottomlayernum} 不行的