大神帮忙看看这条path timing的问题出在哪里？

Startpoint: u_power_pmu/u_padc/u_pad_switch/current_state_reg_1_
(rising edge-triggered flip-flop clocked by hclk)
Endpoint: u_power_pso/u_cpu_subsystem/u_cpu_wrapper/u_ARM926EJS
(rising edge-triggered flip-flop clocked by cpu_clk)
Path Group: cpu_clk
Path Type: max
Attributes:
d - dont_touch
u - dont_use
mo - map_only
so - size_only
i - ideal_net or ideal_network
PointFanoutCapDTranTransDeltaDerateIncrPathLocation / LoadAttributes
----------------------------------------------------------------------------------------------------------------------------------------------------------------
clock hclk (rise edge)0.0000.000
clock network delay (ideal)3.0003.000
u_power_pmu/u_padc/u_pad_switch/current_state_reg_1_/CK (SDFFRQX2M)
0.0000.5000.0000.0003.000 r(2260.17,750.45)so i
u_power_pmu/u_padc/u_pad_switch/current_state_reg_1_/Q (SDFFRQX2M)0.5010.6993.699 r(2267.39,750.48)so
u_power_pmu/u_padc/u_pad_switch/current_state[1] (net)
80.0500.0003.699 r[0.03,0.05]
u_power_pmu/u_padc/u_pad_switch/U149/A (INVXLM)0.0000.5010.0000.000 *3.699 r(2267.31,739.01)
u_power_pmu/u_padc/u_pad_switch/U149/Y (INVXLM)0.2350.2163.915 f(2267.75,739.01)
u_power_pmu/u_padc/u_pad_switch/n122 (net)
20.0100.0003.915 f[0.00,0.01]
u_power_pmu/u_padc/u_pad_switch/U126/A0 (AOI211X2M)0.0000.2350.0000.000 *3.915 f(2268.71,733.29)
u_power_pmu/u_padc/u_pad_switch/U126/Y (AOI211X2M)0.7660.5214.436 r(2270.10,732.93)
u_power_pmu/u_padc/u_pad_switch/n121 (net)
10.0190.0004.436 r[0.02,0.02]
u_power_pmu/u_padc/u_pad_switch/fs_ns_data[1] (pad_switch)0.0004.436 r(netlink)
u_power_pmu/u_padc/n681 (net)0.0190.0004.436 r[0.02,0.02]
u_power_pmu/u_padc/u_padc_body/fs_ns_data[1] (padc_body)0.0004.436 r(netlink)
u_power_pmu/u_padc/u_padc_body/fs_ns_data[1] (net)0.0190.0004.436 r[0.02,0.02]
u_power_pmu/u_padc/u_padc_body/icc_place116/A (BUFX2M)0.0000.7660.0000.000 *4.436 r(2323.98,724.75)
u_power_pmu/u_padc/u_padc_body/icc_place116/Y (BUFX2M)0.7540.5675.003 r(2324.79,724.61)
u_power_pmu/u_padc/u_padc_body/n29 (net)40.0760.0005.003 r[0.06,0.08]
u_power_pmu/u_padc/u_padc_body/icc_place165/A (INVX1M)0.0000.7540.0000.003 *5.006 r(2516.79,719.01)
u_power_pmu/u_padc/u_padc_body/icc_place165/Y (INVX1M)0.7850.6715.676 f(2516.38,719.01)
u_power_pmu/u_padc/u_padc_body/n1133 (net)
100.0900.0005.676 f[0.05,0.09]
u_power_pmu/u_padc/u_padc_body/U892/C (AND3X4M)0.0000.7850.0000.001 *5.677 f(2542.94,782.16)
u_power_pmu/u_padc/u_padc_body/U892/Y (AND3X4M)0.5280.6856.362 f(2543.76,782.33)
u_power_pmu/u_padc/u_padc_body/n564 (net)80.2340.0006.362 f[0.11,0.23]
u_power_pmu/u_padc/u_padc_body/U1778/A (NAND2X8M)0.0000.5280.0000.006 *6.368 f(2567.10,693.18)
u_power_pmu/u_padc/u_padc_body/U1778/Y (NAND2X8M)1.4610.9647.332 r(2567.49,693.59)
u_power_pmu/u_padc/u_padc_body/NF_DATA_ie[2] (net)
20.5530.0007.332 r[0.55,0.55]
u_power_pmu/u_padc/u_padc_body/NF_DATA_ie[2] (padc_body)0.0007.332 r(netlink)
u_power_pmu/u_padc/NF_DATA_ie[2] (net)0.5530.0007.332 r[0.55,0.55]
u_power_pmu/u_padc/NF_DATA_ie[2] (padc)0.0007.332 r(netlink)
u_power_pmu/NF_DATA_ie[2] (net)0.5530.0007.332 r[0.55,0.55]
u_power_pmu/u_pad/NF_DATA_ie[2] (pad)0.0007.332 r(netlink)
u_power_pmu/u_pad/NF_DATA_ie[2] (net)0.5530.0007.332 r[0.55,0.55]
u_power_pmu/u_pad/u_pad_body/NF_DATA_ie[2] (pad_body)0.0007.332 r(netlink)
u_power_pmu/u_pad/u_pad_body/NF_DATA_ie[2] (net)0.5530.0007.332 r[0.55,0.55]
u_power_pmu/u_pad/u_pad_body/icc_place516/A (CLKBUFX4M)0.0001.4610.0000.127 *7.459 r(3682.47,165.04)
u_power_pmu/u_pad/u_pad_body/icc_place516/Y (CLKBUFX4M)1.1060.8838.342 r(3683.75,165.12)
u_power_pmu/u_pad/u_pad_body/n644 (net)10.2250.0008.342 r[0.18,0.23]
u_power_pmu/u_pad/u_pad_body/u_pad_nf_data_2/IE (PDUW1216CDG)0.0001.1060.0000.026 *8.368 r(4348.95,114.68)d
u_power_pmu/u_pad/u_pad_body/u_pad_nf_data_2/C (PDUW1216CDG)0.8512.27710.644 r(4360.81,114.68)d
u_power_pmu/u_pad/u_pad_body/NF_DATA_c[2] (net)
40.8740.00010.644 r[0.87,0.87]
u_power_pmu/u_pad/u_pad_body/NF_DATA_c[2] (pad_body)0.00010.644 r(netlink)
u_power_pmu/u_pad/NF_DATA_c[2] (net)0.8740.00010.644 r[0.87,0.87]
u_power_pmu/u_pad/NF_DATA_c[2] (pad)0.00010.644 r(netlink)
u_power_pmu/NF_DATA_c[2] (net)0.8740.00010.644 r[0.87,0.87]
u_power_pmu/u_padc/NF_DATA_c[2] (padc)0.00010.644 r(netlink)
u_power_pmu/u_padc/NF_DATA_c[2] (net)0.8740.00010.644 r[0.87,0.87]
u_power_pmu/u_padc/u_padc_body/NF_DATA_c[2] (padc_body)0.00010.644 r(netlink)
u_power_pmu/u_padc/u_padc_body/NF_DATA_c[2] (net)0.8740.00010.644 r[0.87,0.87]
u_power_pmu/u_padc/u_padc_body/U416/A (INVXLM)0.0000.9450.0000.354 *10.999 r(2444.02,784.92)
u_power_pmu/u_padc/u_padc_body/U416/Y (INVXLM)0.6680.59611.594 f(2444.46,784.92)
u_power_pmu/u_padc/u_padc_body/n160 (net)30.0400.00011.594 f[0.03,0.04]
u_power_pmu/u_padc/u_padc_body/U415/B (NOR2X1M)0.0000.6680.0000.001 *11.595 f(2557.01,790.67)
u_power_pmu/u_padc/u_padc_body/U415/Y (NOR2X1M)1.3760.93412.529 r(2557.59,790.92)
u_power_pmu/u_padc/u_padc_body/padc_arm9_scan_in[2] (net)
10.0470.00012.529 r[0.04,0.05]
u_power_pmu/u_padc/u_padc_body/padc_arm9_scan_in[2] (padc_body)0.00012.529 r(netlink)
u_power_pmu/u_padc/padc_arm9_scan_in[2] (net)0.0470.00012.529 r[0.04,0.05]
u_power_pmu/u_padc/padc_arm9_scan_in[2] (padc)0.00012.529 r(netlink)
u_power_pmu/padc_arm9_scan_in_BBR[2] (net)0.0470.00012.529 r[0.04,0.05]
u_power_pmu/u_pmu_buffer_ring/padc_arm9_scan_in_BBR[2] (pmu_buffer_ring)0.00012.529 r(netlink)
u_power_pmu/u_pmu_buffer_ring/padc_arm9_scan_in_BBR[2] (net)
0.0470.00012.529 r[0.04,0.05]
u_power_pmu/u_pmu_buffer_ring/u_BBR_padc_arm9_scan_in_2/A (CLKBUFX6M)
0.0001.3760.0000.001 *12.531 r(2744.37,796.43)
u_power_pmu/u_pmu_buffer_ring/u_BBR_padc_arm9_scan_in_2/Y (CLKBUFX6M)1.4251.07413.604 r(2745.76,796.74)
u_power_pmu/u_pmu_buffer_ring/padc_arm9_scan_in[2] (net)
10.3820.00013.604 r[0.38,0.38]
u_power_pmu/u_pmu_buffer_ring/padc_arm9_scan_in[2] (pmu_buffer_ring)0.00013.604 r(netlink)
u_power_pmu/padc_arm9_scan_in[2] (net)0.3820.00013.604 r[0.38,0.38]
u_power_pmu/padc_arm9_scan_in[2] (power_pmu)0.00013.604 r(netlink)
padc_arm9_scan_in[2] (net)0.3820.00013.604 r[0.38,0.38]
u_power_pso/padc_arm9_scan_in[2] (power_pso)0.00013.604 r(netlink)
u_power_pso/padc_arm9_scan_in[2] (net)0.3820.00013.604 r[0.38,0.38]
u_power_pso/u_pso_buffer_ring/padc_arm9_scan_in[2] (pso_buffer_ring)0.00013.604 r(netlink)
u_power_pso/u_pso_buffer_ring/padc_arm9_scan_in[2] (net)
0.3820.00013.604 r[0.38,0.38]
u_power_pso/u_pso_buffer_ring/u_BBR_padc_arm9_scan_in_2/A (CLKBUFX3M)
0.0001.4250.0000.065 *13.669 r(2763.61,2165.44)
u_power_pso/u_pso_buffer_ring/u_BBR_padc_arm9_scan_in_2/Y (CLKBUFX3M)1.2460.93314.603 r(2764.92,2165.43)
u_power_pso/u_pso_buffer_ring/padc_arm9_scan_in_BBR[2] (net)
10.1850.00014.603 r[0.04,0.19]
u_power_pso/u_pso_buffer_ring/padc_arm9_scan_in_BBR[2] (pso_buffer_ring)0.00014.603 r(netlink)
u_power_pso/padc_arm9_scan_in_BBR[2] (net)0.1850.00014.603 r[0.04,0.19]
u_power_pso/u_cpu_subsystem/padc_arm9_scan_in[2] (cpu_subsystem)0.00014.603 r(netlink)
u_power_pso/u_cpu_subsystem/padc_arm9_scan_in[2] (net)
0.1850.00014.603 r[0.04,0.19]
u_power_pso/u_cpu_subsystem/u_cpu_wrapper/padc_arm9_scan_in[2] (cpu_wrapper)0.00014.603 r(netlink)
u_power_pso/u_cpu_subsystem/u_cpu_wrapper/padc_arm9_scan_in[2] (net)
0.1850.00014.603 r[0.04,0.19]
u_power_pso/u_cpu_subsystem/u_cpu_wrapper/u_ARM926EJS/SI2 (ARM926EJS)
0.0001.2460.0000.006 *14.608 r(2777.29,2285.67)d u
data arrival time14.608
clock cpu_clk (rise edge)6.0246.024
clock network delay (ideal)1.6887.712
clock uncertainty-0.9006.812
u_power_pso/u_cpu_subsystem/u_cpu_wrapper/u_ARM926EJS/CLK (ARM926EJS)0.0006.812 r
library setup time0.8217.633
data required time7.633
----------------------------------------------------------------------------------------------------------------------------------------------------------------
data required time7.633
data arrival time-14.608
----------------------------------------------------------------------------------------------------------------------------------------------------------------
slack (VIOLATED)-6.975

Place opt之后的结果 求大神指导

Endpoint: u_power_pso/u_cpu_subsystem/u_cpu_wrapper/u_ARM926EJS是ram吧
属于Reg2Macro的path，而且是两个不同的clock，hclk和cpu_clk。
path上总共12级cell，其中4级是buf，3级是inv，其中2级buf是网表带来的。
建议：1返回DC再次综合；2在palce设group path；3调整floorplan。

感谢大神的犀利的点评 我再去看看 ，这个主要的hclk 的path也是很糟糕。 另外一天是自己hclk内部的reg2reg 也有很大的问题 就SDC角度分析 可能有哪些不合理的地方?
uncertainty 0.9clock_transition 0.5
我看这些带CLK的buf 和逻辑门的transition都接近1ns 我就在place_opt之前把 这些*CLK*都设成 dont use/touch
不知道这样有没有用

Startpoint: u_power_pso/u_cpu_subsystem/u_biu/bufctrl/burlen_got_reg
(rising edge-triggered flip-flop clocked by hclk)
Endpoint: u_power_pmu/u_pmu_um/main_umout_dly_reg_7_
(rising edge-triggered flip-flop clocked by hclk)
Path Group: hclk
Path Type: max
Attributes:
d - dont_touch
u - dont_use
mo - map_only
so - size_only
i - ideal_net or ideal_network
PointFanoutCapDTranTransDeltaDerateIncrPathLocation / LoadAttributes
----------------------------------------------------------------------------------------------------------------------------------------------------------------
clock hclk (rise edge)0.0000.000
clock network delay (ideal)3.0003.000
u_power_pso/u_cpu_subsystem/u_biu/bufctrl/burlen_got_reg/CK (SDFFSQX2M)
0.0000.5000.0000.0003.000 r(2633.11,1683.26)so i
u_power_pso/u_cpu_subsystem/u_biu/bufctrl/burlen_got_reg/Q (SDFFSQX2M)0.2990.6463.646 r(2626.60,1683.14)so
u_power_pso/u_cpu_subsystem/u_biu/bufctrl/n1249 (net)
60.0300.0003.646 r[0.02,0.03]
u_power_pso/u_cpu_subsystem/u_biu/bufctrl/burlen_got (biu_bufctrl)0.0003.646 r(netlink)
u_power_pso/u_cpu_subsystem/u_biu/n50 (net)0.0300.0003.646 r[0.02,0.03]
u_power_pso/u_cpu_subsystem/u_biu/icc_place32/A (CLKINVX1M)0.0000.2990.0000.000 *3.646 r(2620.16,1694.78)
u_power_pso/u_cpu_subsystem/u_biu/icc_place32/Y (CLKINVX1M)0.9750.6444.290 f(2619.68,1694.80)
u_power_pso/u_cpu_subsystem/u_biu/n51 (net)
90.0640.0004.290 f[0.05,0.06]
u_power_pso/u_cpu_subsystem/u_biu/host_if/burlen_got (biu_host_if)0.0004.290 f(netlink)
u_power_pso/u_cpu_subsystem/u_biu/host_if/burlen_got (net)
0.0640.0004.290 f[0.05,0.06]
u_power_pso/u_cpu_subsystem/u_biu/host_if/U76/A (NAND2XLM)0.0000.9750.0000.000 *4.291 f(2632.37,1729.24)
u_power_pso/u_cpu_subsystem/u_biu/host_if/U76/Y (NAND2XLM)0.2980.3134.603 r(2632.05,1729.25)
u_power_pso/u_cpu_subsystem/u_biu/host_if/n41 (net)
10.0050.0004.603 r[0.00,0.00]
u_power_pso/u_cpu_subsystem/u_biu/host_if/U75/S0 (MX2X1M)0.0000.2980.0000.000 *4.603 r(2632.27,1732.00)
u_power_pso/u_cpu_subsystem/u_biu/host_if/U75/Y (MX2X1M)0.7800.7205.323 f(2628.64,1732.05)
u_power_pso/u_cpu_subsystem/u_biu/host_if/sync_oen (net)
50.0890.0005.323 f[0.08,0.09]
u_power_pso/u_cpu_subsystem/u_biu/host_if/sync_oen (biu_host_if)0.0005.323 f(netlink)
u_power_pso/u_cpu_subsystem/u_biu/biu_abi_sync_oen (net)
0.0890.0005.323 f[0.08,0.09]
u_power_pso/u_cpu_subsystem/u_biu/biu_abi_sync_oen (biu)0.0005.323 f(netlink)
u_power_pso/u_cpu_subsystem/biu_abi_sync_oen (net)0.0890.0005.323 f[0.08,0.09]
u_power_pso/u_cpu_subsystem/biu_abi_sync_oen (cpu_subsystem)0.0005.323 f(netlink)
u_power_pso/biu_abi_sync_oen_BBR (net)0.0890.0005.323 f[0.08,0.09]
u_power_pso/u_pso_buffer_ring/biu_abi_sync_oen_BBR (pso_buffer_ring)0.0005.323 f(netlink)
u_power_pso/u_pso_buffer_ring/biu_abi_sync_oen_BBR (net)
0.0890.0005.323 f[0.08,0.09]
u_power_pso/u_pso_buffer_ring/u_BBR_biu_abi_sync_oen/A (CLKBUFX4M)
0.0000.7800.0000.003 *5.327 f(2514.91,1556.99)
u_power_pso/u_pso_buffer_ring/u_BBR_biu_abi_sync_oen/Y (CLKBUFX4M)1.3771.0906.417 f(2513.63,1556.92)
u_power_pso/u_pso_buffer_ring/biu_abi_sync_oen (net)
10.2670.0006.417 f[0.27,0.27]
u_power_pso/u_pso_buffer_ring/biu_abi_sync_oen (pso_buffer_ring)0.0006.417 f(netlink)
u_power_pso/biu_abi_sync_oen (net)0.2670.0006.417 f[0.27,0.27]
u_power_pso/biu_abi_sync_oen (power_pso)0.0006.417 f(netlink)
biu_abi_sync_oen (net)0.2670.0006.417 f[0.27,0.27]
u_power_pmu/biu_abi_sync_oen (power_pmu)0.0006.417 f(netlink)
u_power_pmu/biu_abi_sync_oen (net)0.2670.0006.417 f[0.27,0.27]
u_power_pmu/u_auto_pso2pmu_iso/biu_abi_sync_oen (pso2pmu_iso)0.0006.417 f(netlink)
u_power_pmu/u_auto_pso2pmu_iso/biu_abi_sync_oen (net)
0.2670.0006.417 f[0.27,0.27]
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/A (VG_ISO_OR2X2M_55)0.0006.417 f(netlink)
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/A (net)
0.2670.0006.417 f[0.27,0.27]
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/u_iso_and/A (VG_ISO_AND2X2M_55)0.0006.417 f(netlink)
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/u_iso_and/A (net)
0.2670.0006.417 f[0.27,0.27]
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/u_iso_and/u_pmk_iso_and/A (ISOLNX2M)
0.0001.3770.0000.032 *6.449 f(2278.81,787.76)so
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/u_iso_and/u_pmk_iso_and/Y (ISOLNX2M)
0.1000.4236.872 f(2277.30,788.17)so
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/u_iso_and/Y (net)
10.0060.0006.872 f[0.00,0.01]
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/u_iso_and/Y (VG_ISO_AND2X2M_55)0.0006.872 f(netlink)
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/temp (net)
0.0060.0006.872 f[0.00,0.01]
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/u_bypass_mux/B (CLKMX2X2M)
0.0000.1000.0000.000 *6.872 f(2274.36,776.66)
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/u_bypass_mux/Y (CLKMX2X2M)
1.3160.9677.839 f(2271.54,776.26)
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/Y (net)
20.1370.0007.839 f[0.13,0.14]
u_power_pmu/u_auto_pso2pmu_iso/u_biu_abi_sync_oen_iso/Y (VG_ISO_OR2X2M_55)0.0007.839 f(netlink)
u_power_pmu/u_auto_pso2pmu_iso/biu_abi_sync_oen_iso (net)
0.1370.0007.839 f[0.13,0.14]
u_power_pmu/u_auto_pso2pmu_iso/biu_abi_sync_oen_iso (pso2pmu_iso)0.0007.839 f(netlink)
u_power_pmu/biu_abi_sync_oen_iso (net)0.1370.0007.839 f[0.13,0.14]
u_power_pmu/u_abi/biu_abi_sync_oen (abi)0.0007.839 f(netlink)
u_power_pmu/u_abi/biu_abi_sync_oen (net)0.1370.0007.839 f[0.13,0.14]
u_power_pmu/u_abi/u_read_ctrl/sync_oen (abi_read)0.0007.839 f(netlink)
u_power_pmu/u_abi/u_read_ctrl/sync_oen (net)0.1370.0007.839 f[0.13,0.14]
u_power_pmu/u_abi/u_read_ctrl/U4/B0 (AOI32XLM)0.0001.3160.0000.009 *7.848 f(2054.57,483.62)
u_power_pmu/u_abi/u_read_ctrl/U4/Y (AOI32XLM)0.4840.5278.375 r(2054.90,483.85)
u_power_pmu/u_abi/u_read_ctrl/n34 (net)10.0040.0008.375 r[0.00,0.00]
u_power_pmu/u_abi/u_read_ctrl/rdata_oen (abi_read)0.0008.375 r(netlink)
u_power_pmu/u_abi/abi_bypass_rdata_oen (net)0.0040.0008.375 r[0.00,0.00]
u_power_pmu/u_abi/abi_bypass_rdata_oen (abi)0.0008.375 r(netlink)
u_power_pmu/n1651 (net)0.0040.0008.375 r[0.00,0.00]
u_power_pmu/icc_place983/A (CLKINVX2M)0.0000.4840.0000.000 *8.375 r(2053.72,486.44)
u_power_pmu/icc_place983/Y (CLKINVX2M)1.1820.8239.198 f(2054.16,486.49)
u_power_pmu/n1653 (net)210.1200.0009.198 f[0.09,0.12]
u_power_pmu/u_bypass/abi_bypass_rdata_oen (bypass)0.0009.198 f(netlink)
u_power_pmu/u_bypass/abi_bypass_rdata_oen (net)0.1200.0009.198 f[0.09,0.12]
u_power_pmu/u_bypass/U141/A (CLKAND2X2M)0.0001.1820.0000.001 *9.199 f(2105.39,512.29)
u_power_pmu/u_bypass/U141/Y (CLKAND2X2M)1.2321.08610.285 f(2103.86,512.29)
u_power_pmu/u_bypass/bypass_host_delay_wdata[7] (net)
100.1270.00010.285 f[0.11,0.13]
u_power_pmu/u_bypass/bypass_host_delay_wdata[7] (bypass)0.00010.285 f(netlink)
u_power_pmu/bypass_host_delay_wdata[7] (net)0.1270.00010.285 f[0.11,0.13]
u_power_pmu/u_host_delay/bypass_host_delay_wdata[7] (host_delay)0.00010.285 f(netlink)
u_power_pmu/u_host_delay/bypass_host_delay_wdata[7] (net)
0.1270.00010.285 f[0.11,0.13]
u_power_pmu/u_host_delay/u_host_delay_core/byp002.561-1.061 (VIOLATED)
u_power_pmu/NF_RB1_i1.5002.557-1.057(VIOLATED)
PIN :u_power_pmu/u_pad/u_pad_body/icc_place989/A1.5002.557-1.057 (VIOLATED)
PIN :u_power_pmu/u_padc/u_padc_body/U783/Y1.5002.557-1.057 (VIOLATED)
u_power_pso/u_video_subsystem/u_vdec/u_vdec_sramtop/u_vc0830_vdec_bist_con/vc0830_vdec_bist_instance/n1551.5002.500-1.000 (VIOLATED)
PIN :u_power_pso/u_video_subsystem/u_vdec/u_vdec_sramtop/u_vc0830_vdec_bist_con/vc0830_vdec_bist_instance/U696/Y1.5002.500-1.000 (VIOLATED)
u_power_pmu/u_pad/u_pad_body/n18661.5002.499-0.999(VIOLATED)
PIN :u_power_pmu/u_pad/u_pad_body/icc_place79/A1.5002.499-0.999 (VIOLATED)
PIN :u_power_pmu/u_pad/u_pad_body/icc_place1230/Y1.5002.467-0.967 (VIOLATED)
u_power_pso/u_video_subsystem/u_vdec/uhw7170dec/ufilterd/ufilterdcalc/n16791.5002.467-0.967 (VIOLATED)
PIN :u_power_pso/u_video_subsystem/u_vdec/uhw7170dec/ufilterd/ufilterdcalc/icc_place2980/A11.5002.467-0.967 (VIOLATED)
PIN :u_power_pso/u_video_subsystem/u_vdec/uhw7170dec/ufilterd/ufilterdcalc/icc_place599/Y1.5002.467-0.967 (VIOLATED)
u_power_pmu/SEND_END_i1.5002.203-0.703(VIOLATE18.101 f(2365.83,1714.73)
u_power_pso/u_cpu_subsystem/u_cpu_um/n59 (net)
10.1450.00018.101 f[0.14,0.14]
u_power_pso/u_cpu_subsystem/u_cpu_um/U7/C1 (AOI222X1M)0.0001.4020.0000.011 *18.112 f(1839.68,1714.88)
u_power_pso/u_cpu_subsystem/u_cpu_um/U7/Y (AOI222X1M)0.9440.89319.005 r(1837.54,1714.83)
u_power_pso/u_cpu_subsystem/u_cpu_um/n6 (net)
10.0140.00019.005 r[0.01,0.01]
u_power_pso/u_cpu_subsystem/u_cpu_um/U6/A (INVXLM)0.0000.9440.0000.000 *19.005 r(1854.85,1743.51)
u_power_pso/u_cpu_subsystem/u_cpu_um/U6/Y (INVXLM)0.2480.17419.179 f(1855.29,1743.51)
u_power_pso/u_cpu_subsystem/u_cpu_um/cpu_um_out[7] (net)
10.0050.00019.179 f[0.00,0.00]
u_power_pso/u_cpu_subsystem/u_cpu_um/cpu_um_out[7] (cpu_um)0.00019.179 f(netlink)
u_power_pso/u_cpu_subsystem/cpu_um_out[7] (net)0.0050.00019.179 f[0.00,0.00]
u_power_pso/u_cpu_subsystem/u_umonitor/cpu_um_out[7] (umonitor)0.00019.179 f(netlink)
u_power_pso/u_cpu_subsystem/u_umonitor/cpu_um_out[7] (net)
0.0050.00019.179 f[0.00,0.00]
u_power_pso/u_cpu_subsystem/u_umonitor/U10/B1 (AOI22XLM)0.0000.2480.0000.000 *19.179 f(1858.72,1752.21)
u_power_pso/u_cpu_subsystem/u_umonitor/U10/Y (AOI22XLM)0.8780.61119.790 r(1860.34,1752.26)
u_power_pso/u_cpu_subsystem/u_umonitor/n10 (net)
10.0140.00019.790 r[0.01,0.01]
u_power_pso/u_cpu_subsystem/u_umonitor/U8/B0 (OAI2B11X2M)0.0000.8780.0000.000 *19.790 r(1899.97,1752.19)
u_power_pso/u_cpu_subsystem/u_umonitor/U8/Y (OAI2B11X2M)0.7280.59620.387 f(1900.16,1751.89)
u_power_pso/u_cpu_subsystem/u_umonitor/pso_um_out[7] (net)
10.0500.00020.387 f[0.05,0.05]
u_power_pso/u_cpu_subsystem/u_umonitor/pso_um_out[7] (umonitor)0.00020.387 f(netlink)
u_power_pso/u_cpu_subsystem/pso_um_out[7] (net)0.0500.00020.387 f[0.05,0.05]
u_power_pso/u_cpu_subsystem/pso_um_out[7] (cpu_subsystem)0.00020.387 f(netlink)
u_power_pso/pso_um_out_BBR[7] (net)0.0500.00020.387 f[0.05,0.05]
u_power_pso/u_pso_buffer_ring/pso_um_out_BBR[7] (pso_buffer_ring)0.00020.387 f(netlink)
u_power_pso/u_pso_buffer_ring/pso_um_out_BBR[7] (net)
0.0500.00020.387 f[0.05,0.05]
u_power_pso/u_pso_buffer_ring/icc_place38/A (CLKBUFX4M)0.0000.7280.0000.001 *20.388 f(1930.54,1611.53)
u_power_pso/u_pso_buffer_ring/icc_place38/Y (CLKBUFX4M)1.2140.98721.375 f(1931.82,1611.60)
u_power_pso/u_pso_buffer_ring/n27 (net)10.2350.00021.375 f[0.23,0.24]
u_power_pso/u_pso_buffer_ring/pso_um_out[7] (pso_buffer_ring)0.00021.375 f(netlink)
u_power_pso/pso_um_out[7] (net)0.2350.00021.375 f[0.23,0.24]
u_power_pso/pso_um_out[7] (power_pso)0.00021.375 f(netlink)
pso_um_out[7] (net)0.2350.00021.375 f[0.23,0.24]
u_power_pmu/pso_um_out[7] (power_pmu)0.00021.375 f(netlink)
u_power_pmu/pso_um_out[7] (net)0.2350.00021.375 f[0.23,0.24]
u_power_pmu/u_auto_pso2pmu_iso/pso_um_out[7] (pso2pmu_iso)0.00021.375 f(netlink)
u_power_pmu/u_auto_pso2pmu_iso/pso_um_out[7] (net)0.2350.00021.375 f[0.23,0.24]
u_power_pmu/u_auto_pso2pmu_iso/u_pso_um_out_7_iso/A (VG_ISO_AND2X2M_606)0.00021.375 f(netlink)
u_power_pmu/u_auto_pso2pmu_iso/u_pso_um_out_7_iso/A (net)
0.2350.00021.375 f[0.23,0.24]
u_power_pmu/u_auto_pso2pmu_iso/u_pso_um_out_7_iso/u_pmk_iso_and/A (ISOLNX2M)
0.0001.2140.0000.025 *21.400 f(1963.69,762.08)so
u_power_pmu/u_auto_pso2pmu_iso/u_pso_um_out_7_iso/u_pmk_iso_and/Y (ISOLNX2M)
0.2010.49421.894 f(1965.20,761.67)so
u_power_pmu/u_auto_pso2pmu_iso/u_pso_um_out_7_iso/Y (net)
20.0330.00021.894 f[0.03,0.03]
u_power_pmu/u_auto_pso2pmu_iso/u_pso_um_out_7_iso/Y (VG_ISO_AND2X2M_606)0.00021.894 f(netlink)
u_power_pmu/u_auto_pso2pmu_iso/pso_um_out_iso[7] (net)
0.0330.00021.894 f[0.03,0.03]
u_power_pmu/u_auto_pso2pmu_iso/pso_um_out_iso[7] (pso2pmu_iso)0.00021.894 f(netlink)
u_power_pmu/pso_um_out_iso[7] (net)0.0330.00021.894 f[0.03,0.03]
u_power_pmu/u_pmu_um/pso_um_out[7] (pmu_um)0.00021.894 f(netlink)
u_power_pmu/u_pmu_um/pso_um_out[7] (net)0.0330.00021.894 f[0.03,0.03]
u_power_pmu/u_pmu_um/main_umout_dly_reg_7_/D (SDFFRQX2M)0.0000.2010.0000.001 *21.895 f(1997.66,695.08)so
data arrival time21.895
clock hclk (rise edge)6.0246.024
clock network delay (ideal)3.0009.024
clock uncertainty-0.9008.124
u_power_pmu/u_pmu_um/main_umout_dly_reg_7_/CK (SDFFRQX2M)0.0008.124 r
library setup time-0.3607.764
data required time7.764
----------------------------------------------------------------------------------------------------------------------------------------------------------------
data required time7.764
data arrival time-21.895
----------------------------------------------------------------------------------------------------------------------------------------------------------------
slack (VIOLATED)-14.1

不是什么大神，别乱说。
clock_uncertainty 和 clock_transition 的值跟工艺等有关，留很多情况下都是10%period，设得差不多就行了。
论坛里有不少这样的帖子，自己找。
你上面这条path，就算把所有的cell贴到一起，都不一定能跑到6.024ns以下。时钟周期是不是可以狠狠的放松下。
中间还出现了莫名其妙的一段。
u_power_pmu/u_host_delay/bypass_host_delay_wdata[7] (net)
0.1270.00010.285 f[0.11,0.13]
u_power_pmu/u_host_delay/u_host_delay_core/byp002.561-1.061 (VIOLATED)
u_power_pmu/NF_RB1_i1.5002.557-1.057(VIOLATED)
PIN :u_power_pmu/u_pad/u_pad_body/icc_place989/A1.5002.557-1.057 (VIOLATED)
PIN :u_power_pmu/u_padc/u_padc_body/U783/Y1.5002.557-1.057 (VIOLATED)
u_power_pso/u_video_subsystem/u_vdec/u_vdec_sramtop/u_vc0830_vdec_bist_con/vc0830_vdec_bist_instance/n1551.5002.500-1.000 (VIOLATED)
PIN :u_power_pso/u_video_subsystem/u_vdec/u_vdec_sramtop/u_vc0830_vdec_bist_con/vc0830_vdec_bist_instance/U696/Y1.5002.500-1.000 (VIOLATED)
u_power_pmu/u_pad/u_pad_body/n18661.5002.499-0.999(VIOLATED)
PIN :u_power_pmu/u_pad/u_pad_body/icc_place79/A1.5002.499-0.999 (VIOLATED)
PIN :u_power_pmu/u_pad/u_pad_body/icc_place1230/Y1.5002.467-0.967 (VIOLATED)
u_power_pso/u_video_subsystem/u_vdec/uhw7170dec/ufilterd/ufilterdcalc/n16791.5002.467-0.967 (VIOLATED)
PIN :u_power_pso/u_video_subsystem/u_vdec/uhw7170dec/ufilterd/ufilterdcalc/icc_place2980/A11.5002.467-0.967 (VIOLATED)
PIN :u_power_pso/u_video_subsystem/u_vdec/uhw7170dec/ufilterd/ufilterdcalc/icc_place599/Y1.5002.467-0.967 (VIOLATED)
u_power_pmu/SEND_END_i1.5002.203-0.703(VIOLATE18.101 f(2365.83,1714.73)
u_power_pso/u_cpu_subsystem/u_cpu_um/n59 (net)
10.1450.00018.101 f[0.14,0.14]

恩时钟周期应该没法调 因为是一个generate clock 。
这个design 就是也许存在某些问题 要我去debug， 我就是找不到原因

也许存在某些问题?
要你去debug的那个人挺神的。
自己都不知道有什么问题，然后找原因。这不本末倒置。
挺有意思的。我和小伙伴都惊呆了。

我就是在training吗 ， 想通过自己的能力去找出约束的不合理之处。
不是真实做design的
Thanks all of your help.