PR时OptDesign进行不下去是什么原因？
时间：10-02
整理：3721RD
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显示的warning如下：
Options: timingDriven clkGateAware ignoreScan ignoreSpare pinGuide gp=slow
Begin checking placement ...
Overlapping with other instance:2
Orientation Violation:1
Placement Blockage Violation:1
*info: Placed = 26575
*info: Unplaced = 0
Placement Density:60.03%(804332/1339785)
*ERROR*: Found placement violations in postRoute mode
*Info*: Fix the placement violations and reroute the design
*Info*: Command refinePlace may be used to fix the placement violations
根据提示需要做 refinePlace ，但是refinePlace不能解决问题。
Options: timingDriven clkGateAware ignoreScan ignoreSpare pinGuide gp=slow
Begin checking placement ...
Overlapping with other instance:2
Orientation Violation:1
Placement Blockage Violation:1
*info: Placed = 26575
*info: Unplaced = 0
Placement Density:60.03%(804332/1339785)
*ERROR*: Found placement violations in postRoute mode
*Info*: Fix the placement violations and reroute the design
*Info*: Command refinePlace may be used to fix the placement violations
根据提示需要做 refinePlace ，但是refinePlace不能解决问题。
有Macro互相盖到了，单独做一下checkPlacement，看问题出在哪里?也许是Block overlap，也可以是Block摆到Core边界外，改正，做refinePlace，在进timing OPT
Found placement violations in postRoute mode
这里已经告诉问题所在了，看下是不是有些Macro的摆放有问题。
checkPlace ,
看看violation 在哪里
有些fixed 的东西overlap了，这个refineplace没用的，
对，很可能是fixed std。或 macro cell有overlap
Orientation Violation:1
我做的时候有这个错误导致不能进行OPT，找到那个方向错误的单元旋转90度就好了。