求助LVS验证：版图HIERARCHICAL时能过验证，可FLAT时过不了验证
FLAT验证结果：
NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
LayoutSourceComponent Type
--------------------------
Ports:5656
Nets:566566
Instances:400390*MN (4 pins)
485471*MP (4 pins)
4444C (2 pins)
122122R (2 pins)
010*INV (2 pins)
02*NAND2 (3 pins)
1311*SDW2 (3 pins)
44SDW3 (4 pins)
88SDW4 (5 pins)
014*SUP2 (3 pins)
9898SMN2 (4 pins)
2424SMN3 (5 pins)
44SMP10 (12 pins)
7864*SMP2 (4 pins)
11SMP3 (5 pins)
22SPMP((10+1)*1*1*1*1*1*1*1*1*1*1) (23 pins)
11SPMP((3+1)*1) (7 pins)
------------
Total Inst:12841270
* = Number of objects in layout different from number in source.
NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
LayoutSourceComponent Type
--------------------------
Ports:5656
Nets:566566
Instances:400390*MN (4 pins)
485471*MP (4 pins)
4444C (2 pins)
122122R (2 pins)
010*INV (2 pins)
02*NAND2 (3 pins)
1311*SDW2 (3 pins)
44SDW3 (4 pins)
88SDW4 (5 pins)
014*SUP2 (3 pins)
9898SMN2 (4 pins)
2424SMN3 (5 pins)
44SMP10 (12 pins)
7864*SMP2 (4 pins)
11SMP3 (5 pins)
22SPMP((10+1)*1*1*1*1*1*1*1*1*1*1) (23 pins)
11SPMP((3+1)*1) (7 pins)
------------
Total Inst:12841270
* = Number of objects in layout different from number in source.
NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
LayoutSourceComponent Type
--------------------------
Ports:5656
Nets:566566
Instances:400390*MN (4 pins)
485471*MP (4 pins)
4444C (2 pins)
122122R (2 pins)
010*INV (2 pins)
02*NAND2 (3 pins)
1311*SDW2 (3 pins)
44SDW3 (4 pins)
88SDW4 (5 pins)
014*SUP2 (3 pins)
9898SMN2 (4 pins)
2424SMN3 (5 pins)
44SMP10 (12 pins)
7864*SMP2 (4 pins)
11SMP3 (5 pins)
22SPMP((10+1)*1*1*1*1*1*1*1*1*1*1) (23 pins)
11SPMP((3+1)*1) (7 pins)
------------
Total Inst:12841270
* = Number of objects in layout different from number in source.
**************************************************************************************************************
INFORMATION AND WARNINGS
**************************************************************************************************************
o Statistics:
4 isolated layout nets were deleted.
1 passthrough layout net was deleted.
16 source instances were filtered and their adjoining nets shorted.
31 source nets were deep shorted to 15.
12 source instances were filtered and their pins removed from adjoining nets.
3618 layout mos transistors were reduced to 397.650 connecting nets were deleted.
1921 mos transistors were deleted by parallel reduction.
1300 mos transistors and 650 connecting nets were deleted by split-gate reduction.
90 source mos transistors were reduced to 24.3 connecting nets were deleted.
60 mos transistors were deleted by parallel reduction.
6 mos transistors and 3 connecting nets were deleted by split-gate reduction.
202 parallel layout capacitors were reduced to 25.
200 parallel source capacitors were reduced to 25.
994 series/parallel layout resistors were reduced to 87.822 connecting nets were deleted.
36 series/parallel source resistors were reduced to 7.1 connecting net was deleted.
1 unused layout capacitor was deleted.
1 unused source capacitor was deleted.
**************************************************************************************************************
SUMMARY
**************************************************************************************************************
Total CPU Time:2 sec
Total Elapsed Time:2 sec
485471*MP (4 pins)
010*INV (2 pins)
02*NAND2 (3 pins)
1311*SDW2 (3 pins)
014*SUP2 (3 pins)
7864*SMP2 (4 pins)
这里明显告诉你了，你的版图里面缺少这些。也有可能是选项造成的，你比较hier和flat的command file 选项有什么不同吗?
你是不是有很多spare cell，我曾经也遇到过此类情况
什么是否spare cell?不好意思啊
好东西！
hier和flat用的是同个command file，选项应该都是一样的，只是它们的验证方式不一样。
SDW2,SUP2,SMP2是如何定义的?
是不是有black box，如果有的话有可能是black box的pin链接的有问题；看看有没有soft connect；有没有打电源地的pin
有一种可能 就是你版图有两个cell是用样的名字，一个是大写的，一个小写的。所以会出错。
谢谢各位，原因我找到了，是电路里有net名为电源的名字，更改一下net名，flat就地验证了。
请教一下，如何把layout做成black box?
如果你电路名字叫tx，rx，px，layout对应的名字也是tx，rx，px，只要在lvs command file里面加上一句话：
LVS BOX txrxpx
这样就ok了
在我这里似乎不管用，和calibre版本有关么?
我只在部分版图外包的情况下用过LVS BOX，现在版图和电路都有的情况下也是只写这么一句话就可以用了么?
最近lvs验证点很背！