IODELAY ISERDESE
时间:10-02
整理:3721RD
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在K7上有一个工程,现在要移植到V6上,由于IODELAY和ISERDESE K7和V6上不同,在移植的过程中,V6 map的时候报下面的错误:
ERROR:hysDesignRules:1487 - The placed IODELAYE1 component
adc_data_b.4.IDELAYE2_inst_ADC_ch_B has the C pin connected to the signal
clk_200Mhz while the adjacent site has the placed ISERDESE1 component
adc_data_b.4.ISERDESE2_adc_chb with the CLKdiv pin connected to the signal
clk_122_88MHz. These two pins share the routing resource and the use of
separate signals creates a routing resource conflict. Only one signal can be
used for these two pins.
哪位能帮忙看看,谢谢!
移植的时候,你都做了哪些修改?
没仔细看V6和K7的IDelay的区别,但是经验来说移植是需要从新设计该组件的,因为输入输出一般不同。
有个问题是为啥要K7到V6移植?反向的到很好解释。
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