64位VCS在Centos6.4上跑仿真出现问题，求帮助

问题如下：
recompiling module tb because:
        The DAIDB file (jUh1_1.tt) is missing.
recompiling module data_generator because:
        The DAIDB file (h6Ji_1.tt) is missing.
Both modules done.
if [ -x ../simv ]; then chmod -x ../simv; fi
g++  -o ../simv     -Wl,-whole-archive    -Wl,-no-whole-archive  _vcsobj_1_1.o  5NrI_d.o \
5NrIB_d.o SIM_l.o     rmapats_mop.o rmapats.o       /usr/eda/Synopsys/vcs_mx_vH-2013/amd64/lib/libzerosoft_rt_stubs.so \
/usr/eda/Synopsys/vcs_mx_vH-2013/amd64/lib/libvirsim.so /usr/eda/Synopsys/vcs_mx_vH-2013/amd64/lib/liberrorinf.so \
/usr/eda/Synopsys/vcs_mx_vH-2013/amd64/lib/libsnpsmalloc.so     /usr/eda/Synopsys/vcs_mx_vH-2013/amd64/lib/libvcsnew.so \
/usr/eda/Synopsys/vcs_mx_vH-2013/amd64/lib/libvcsucli.so /usr/eda/Synopsys/vcs_mx_vH-2013/amd64/lib/libuclinative.so \
/usr/eda/Synopsys/vcs_mx_vH-2013/amd64/lib/vcs_save_restore_new.o -ldl -lm  -lc -lpthread \
-ldl
../simv up to date
CPU time: .927 seconds to compile + .706 seconds to elab + .063 seconds to link