微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 嵌入式设计讨论 > FPGA,CPLD和ASIC > ISE11.1综合warning

ISE11.1综合warning

时间:10-02 整理:3721RD 点击:

module data_generator( clk, rst_n, addr, read_en, write_en, wr_data, load );
input         clk;    //50MHz
input         rst_n;
output[17:0]  addr;
output[15:0]  wr_data;
output           read_en;
output           write_en;
output           load;
parameter     TIME_1000MS = 26'd49999999;
parameter     TIME_200US  = 26'd9999;
parameter     TIME_400US  = 26'd19999;
parameter     TIME_600US  = 26'd29999;
//----------------------------------------------------------
reg[25:0] delay_1000ms;
always @(posedge clk or negedge rst_n) begin
  if (!rst_n) begin
    delay_1000ms <= 26'b0;
  end
  else if (delay_1000ms == 26'd30010) begin
    delay_1000ms <= 26'b0;
  end  
  else begin
    delay_1000ms <= delay_1000ms + 1'b1;
  end
end
assign write_en = (delay_1000ms == TIME_200US);   //200us later write sram
assign read_en  = (delay_1000ms == TIME_400US);   //200us later read  sram
reg[17:0]addr;
reg[15:0]wr_data;
always @(posedge clk or negedge rst_n) begin
  if (!rst_n) begin
    addr <= 18'h00000;
  end
  else if (delay_1000ms == 26'd29999) begin
    addr <= addr + 1'b1;
  end
end
always @(posedge clk or negedge rst_n) begin
  if (!rst_n) begin
    wr_data <= 16'b0;
  end
  else if (delay_1000ms == TIME_600US) begin
    wr_data<= wr_data + 16'd2;
  end
end
//------------------------------------------------
  wire load;
  assign load = (delay_1000ms == TIME_600US) ? 1'b1 : 1'b0;
endmodule
代码功能:产生周期的write_en与read_en信号,wr_data与addr。代码语法正确,但是用ISE11.1综合的时候addr产生了很多的warning。
WARNING:Xst:1710 - FF/Latch <addr_17> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_16> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_15> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_14> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_13> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_12> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_11> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_10> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_9> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_8> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_7> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_6> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_5> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_4> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_3> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_2> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_1> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_0> (without init value) has a constant value of 0 in block <data_generator>. This FF/Latch will be trimmed during the optimization process.

我翻来覆去的看代码,发现不了到底是什么问题。不知道各位有没有解决方法。

ADDR 声明成REG型试下



   已经申明成reg了的

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top