微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 嵌入式设计讨论 > FPGA,CPLD和ASIC > 声音信号到来判断程序“跑死”

声音信号到来判断程序“跑死”

时间:10-02 整理:3721RD 点击:
reg a;
reg b;
reg c;
reg d;   
///////abcd信号到来指示,为1表示信号到达
always @(posedge clka or negedge reset)
begin
if(!reset)
begin
a<=1'b0;
end
else
begin a<=1'b1;end
end
always @(posedge clkb or negedge reset)
begin
if(!reset)
begin
b<=1'b0;
end
else
begin b<=1'b1;end
end
always @(posedge clkc or negedge reset)
begin
if(!reset)
begin
c<=1'b0;
end
else
begin c<=1'b1;end
end
always @(posedge clkd or negedge reset)
begin
if(!reset)
begin
d<=1'b0;
end
else
begin d<=1'b1;end
end
//判断四路信号输入,加复位后出现以下问题
Info: Registers with preset signals will power-up high
Info: DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
Warning: Output pins are stuck at VCC or GND
Warning (13410): Pin "LCD_RW" is stuck at GND
程序跑到上面提示后跑不下去了,但是把复位去掉只有
always @(posedge clkd or negedge reset)
begin
d<=1'b1;
end时却可以跑,请问有何问题?

negedge reset,也就是采用低复位,后面代码也是低复位。
把reset的产生逻辑发出来一下。

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top