麻烦问一下 这个程序哪里错了

module counter_mod_32(clock,C);
input clock;
output[4:0] C;
reg[4:0] C;
always@(posedge clock)
begin
    C<=C+1;
end
endmodule
module se_to_pa(ser_in,clk,out);
input ser_in;
input clk;
output[31:0] out;
wire[31:0] out;
reg[31:0] par_out;
wire[4:0] count;
counter_mod_32 f1(.clock(clk),.C(count));
always@(posedge clk)
    begin
par_out<={par_out[30:0],ser_in};
end
assign out=(count==31)?par_out:32'b0000_0000_0000_0000_0000_0000_0000_0000;
endmodule



错误提示是
Bitgen:342 - This design contains pins which have locations (LOC) that are
   not user-assigned or I/O Standards (IOSTANDARD) that are not user-assigned.
   This may cause I/O contention or incompatibility with the board power or
   connectivity affecting performance, signal integrity or in extreme cases
   cause damage to the device or the components to which it is connected.  To
   prevent this error, it is highly suggested to specify all pin locations and
   I/O standards to avoid potential contention or conflicts and allow proper
   bitstream creation.  To demote this error to a warning and allow bitstream
   creation with unspecified I/O location or standards, you may apply the
   following bitgen switch: -g UnconstrainedPins:Allow

ucf定义管脚有问题