0120711
时间：10-02
整理：3721RD
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0120711
我是用FPGA驱动 直流无刷电机，
用霍尔传感器去捕捉电机转子的转动状况，从而控制如何驱动三相电流换相，
霍尔传感器是181 的霍尔开关，驱动马达时候发现马达转动仍有杂音，
接收霍尔信号时候，用了一个case 语句，有default 的时后，我选着给默认状态
PWM输出全部拉低，不驱动马达，烧录硬件后，马达转动，噪音仍有，消不掉，但较为小，
但是去掉默认状态后，马达转动磕磕绊绊，非常不理想，
现在硬没有上位机，观察信号很不方便，思考中，望指点
望有经验的人指点一下
case({hall_a,hall_b,hall_c})
3'b110:
begin
pwm_3_h<=clk_20k;
pwm_3_l<=1'd0;
pwm_2_h<=1'd0;
pwm_2_l<=1'd0;
pwm_1_h<=1'd0;
pwm_1_l<=clk_20k;
end
3'b100:
begin
pwm_3_h<=clk_20k;
pwm_3_l<=1'd0;
pwm_2_h<=1'd0;
pwm_2_l<=clk_20k;
pwm_1_h<=1'd0;
pwm_1_l<=1'd0;
end
3'b101:
begin
pwm_3_h<=1'd0;
pwm_3_l<=1'd0;
pwm_2_h<=1'd0;
pwm_2_l<=clk_20k;
pwm_1_h<=clk_20k;
pwm_1_l<=1'd0;
end
3'b001:
begin
pwm_3_h<=1'd0;
pwm_3_l<=clk_20k;
pwm_2_h<=1'd0;
pwm_2_l<=1'd0;
pwm_1_h<=clk_20k;
pwm_1_l<=1'd0;
end
3'b011:
begin
pwm_3_h<=1'd0;
pwm_3_l<=clk_20k;
pwm_2_h<=clk_20k;
pwm_2_l<=1'd0;
pwm_1_h<=1'd0;
pwm_1_l<=1'd0;
end
3'b010:
begin
pwm_3_h<=1'd0;
pwm_3_l<=1'd0;
pwm_2_h<=clk_20k;
pwm_2_l<=1'd0;
pwm_1_h<=1'd0;
pwm_1_l<=clk_20k;
end
default:
begin
pwm_3_h<=1'd0;
pwm_3_l<=1'd0;
pwm_2_h<=1'd0;
pwm_2_l<=1'd0;
pwm_1_h<=1'd0;
pwm_1_l<=1'd0;
end
endcase
我是用FPGA驱动 直流无刷电机，
用霍尔传感器去捕捉电机转子的转动状况，从而控制如何驱动三相电流换相，
霍尔传感器是181 的霍尔开关，驱动马达时候发现马达转动仍有杂音，
接收霍尔信号时候，用了一个case 语句，有default 的时后，我选着给默认状态
PWM输出全部拉低，不驱动马达，烧录硬件后，马达转动，噪音仍有，消不掉，但较为小，
但是去掉默认状态后，马达转动磕磕绊绊，非常不理想，
现在硬没有上位机，观察信号很不方便，思考中，望指点
望有经验的人指点一下
case({hall_a,hall_b,hall_c})
3'b110:
begin
pwm_3_h<=clk_20k;
pwm_3_l<=1'd0;
pwm_2_h<=1'd0;
pwm_2_l<=1'd0;
pwm_1_h<=1'd0;
pwm_1_l<=clk_20k;
end
3'b100:
begin
pwm_3_h<=clk_20k;
pwm_3_l<=1'd0;
pwm_2_h<=1'd0;
pwm_2_l<=clk_20k;
pwm_1_h<=1'd0;
pwm_1_l<=1'd0;
end
3'b101:
begin
pwm_3_h<=1'd0;
pwm_3_l<=1'd0;
pwm_2_h<=1'd0;
pwm_2_l<=clk_20k;
pwm_1_h<=clk_20k;
pwm_1_l<=1'd0;
end
3'b001:
begin
pwm_3_h<=1'd0;
pwm_3_l<=clk_20k;
pwm_2_h<=1'd0;
pwm_2_l<=1'd0;
pwm_1_h<=clk_20k;
pwm_1_l<=1'd0;
end
3'b011:
begin
pwm_3_h<=1'd0;
pwm_3_l<=clk_20k;
pwm_2_h<=clk_20k;
pwm_2_l<=1'd0;
pwm_1_h<=1'd0;
pwm_1_l<=1'd0;
end
3'b010:
begin
pwm_3_h<=1'd0;
pwm_3_l<=1'd0;
pwm_2_h<=clk_20k;
pwm_2_l<=1'd0;
pwm_1_h<=1'd0;
pwm_1_l<=clk_20k;
end
default:
begin
pwm_3_h<=1'd0;
pwm_3_l<=1'd0;
pwm_2_h<=1'd0;
pwm_2_l<=1'd0;
pwm_1_h<=1'd0;
pwm_1_l<=1'd0;
end
endcase