求高人解答编译WARNING的问题
时间：10-02
整理：3721RD
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Warning: Found pins functioning as undefined clocks and/or memory enables
Info: Clock "wrclk" Internal fmax is restricted to 195.01 MHz between source
register "fifo2:inst1|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|a_graycounter_6fc:wrptr_gp|counter_ffa[3]" and destination memory "fifo2:inst1|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|altsyncram_9m61:fifo_ram|altsyncram_lse1:altsyncram5|ram_block6a0~portb_we_reg"
Info: Clock "rdclk" has Internal fmax of 180.93 MHz between source register "fifo1:inst|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|alt_synch_pipe_jcb:rs_dgwp|dffpipe_hd9:dffpipe8|dffe10a[1]" and destination register "fifo1:inst|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|a_graycounter_g86:rdptr_g1p|counter_ffa[8]" (period= 5.527 ns)
Info: Clock "clk" has Internal fmax of 167.56 MHz between source register "fifo_contrl:inst6|next_state.s6" and destination register "fifo_contrl:inst6|state[2]" (period= 5.968 ns)
Info: tsu for register "fifo_contrl:inst6|dataout2[3]" (data pin = "arm_req", clock pin = "clk") is 6.777 ns
Info: tco from clock "wrclk" to destination pin "full1" through register "fifo1:inst|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|a_graycounter_6fc:wrptr_gp|counter_ffa[1]" is 12.421 ns
Info: th for register "fifo_contrl:inst6|wrreq1" (data pin = "arm_req", clock pin = "clk") is -1.172 ns
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 1 warning
Info: Peak virtual memory: 141 megabytes
Info: Processing ended: Thu Mar 17 14:38:19 2011
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01
Info: Clock "wrclk" Internal fmax is restricted to 195.01 MHz between source register "fifo1:inst|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|alt_synch_pipe_jcb:rs_dgwp|dffpipe_hd9:dffpipe8|dffe10a[1]" and destination register "fifo1:inst|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|a_graycounter_g86:rdptr_g1p|counter_ffa[8]" (period= 5.527 ns) 这就话的意思是什么啊 还有(period= 5.527 ns)都代表什意思啊 还有其他的都是一样的啊 谢谢大侠帮忙啊 小弟先谢过啊！ 急啊！
Info: Clock "wrclk" Internal fmax is restricted to 195.01 MHz between source
register "fifo2:inst1|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|a_graycounter_6fc:wrptr_gp|counter_ffa[3]" and destination memory "fifo2:inst1|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|altsyncram_9m61:fifo_ram|altsyncram_lse1:altsyncram5|ram_block6a0~portb_we_reg"
Info: Clock "rdclk" has Internal fmax of 180.93 MHz between source register "fifo1:inst|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|alt_synch_pipe_jcb:rs_dgwp|dffpipe_hd9:dffpipe8|dffe10a[1]" and destination register "fifo1:inst|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|a_graycounter_g86:rdptr_g1p|counter_ffa[8]" (period= 5.527 ns)
Info: Clock "clk" has Internal fmax of 167.56 MHz between source register "fifo_contrl:inst6|next_state.s6" and destination register "fifo_contrl:inst6|state[2]" (period= 5.968 ns)
Info: tsu for register "fifo_contrl:inst6|dataout2[3]" (data pin = "arm_req", clock pin = "clk") is 6.777 ns
Info: tco from clock "wrclk" to destination pin "full1" through register "fifo1:inst|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|a_graycounter_6fc:wrptr_gp|counter_ffa[1]" is 12.421 ns
Info: th for register "fifo_contrl:inst6|wrreq1" (data pin = "arm_req", clock pin = "clk") is -1.172 ns
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 1 warning
Info: Peak virtual memory: 141 megabytes
Info: Processing ended: Thu Mar 17 14:38:19 2011
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01
Info: Clock "wrclk" Internal fmax is restricted to 195.01 MHz between source register "fifo1:inst|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|alt_synch_pipe_jcb:rs_dgwp|dffpipe_hd9:dffpipe8|dffe10a[1]" and destination register "fifo1:inst|dcfifo:dcfifo_component|dcfifo_srh1:auto_generated|a_graycounter_g86:rdptr_g1p|counter_ffa[8]" (period= 5.527 ns) 这就话的意思是什么啊 还有(period= 5.527 ns)都代表什意思啊 还有其他的都是一样的啊 谢谢大侠帮忙啊 小弟先谢过啊！ 急啊！
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