微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 嵌入式设计讨论 > FPGA,CPLD和ASIC > Modelsim DE & SystemVerilog

Modelsim DE & SystemVerilog

时间:10-02 整理:3721RD 点击:
Modelsim DE支持SystemVerilog吗?

Thanks for your information!

ModelSim DE Features:
- Native compiled, Single Kernel Simulator technology
- VHDL, Verilog, PSL, and SystemVerilog design and assertions constructs
- Intelligent, easy-to-use GUI with Tcl interface
可以的

Very Good

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top