综合报告为什么没有指出关键路径？
时间：10-02
整理：3721RD
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我用ISE进行综合在报告的最出给出:
........
Timing Summary:
---------------
Speed Grade: -7
Minimum period: 17.389ns (Maximum Frequency: 57.506MHz)
Minimum input arrival time before clock: 5.329ns
Maximum output required time after clock: 3.293ns
Maximum combinational path delay: No path found
=========================================================================
Process "Synthesis" completed successfully
但是没有关于Maximum combinational path delay的信息，这是为什么呀?
请高手指点一下！谢谢！
........
Timing Summary:
---------------
Speed Grade: -7
Minimum period: 17.389ns (Maximum Frequency: 57.506MHz)
Minimum input arrival time before clock: 5.329ns
Maximum output required time after clock: 3.293ns
Maximum combinational path delay: No path found
=========================================================================
Process "Synthesis" completed successfully
但是没有关于Maximum combinational path delay的信息，这是为什么呀?
请高手指点一下！谢谢！
大哥关键路径是后仿的时候看的吧