如何通过综合工具综合后给出的一个报告修改优化自己的设计？
时间：10-02
整理：3721RD
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如何通过综合工具综合后给出的一个报告修改优化自己的设计?
以下面我写的为例子
还请高手指点拉
原代码：
==========================================================================================================================
assign Transmite_Task_Sign =~(|NUM_SIGN_r);
always @(posedge i_Clock or negedge i_Reset_n)
if(~i_Reset_n)
NUM_SIGN_r<=0;
else begin
case ({UART_WR_SWITCH,Transmite_OK_reg})
2'b10:NUM_SIGN_r<=NUM_SIGN;
2'b01:if(NUM_SIGN_r！==0)NUM_SIGN_r<=NUM_SIGN_r-1;
default:NUM_SIGN_r<=NUM_SIGN_r;
endcase
end
==========================================================================================================================
报告：
Worst slack in design: -0.836
Requested Estimated Requested Estimated Clock Clock
Starting Clock Frequency Frequency Period Period Slack Type Group
--------------------------------------------------------------------------------------------------------------------------
I2C_TEST|i_Clock 263.4 MHz 215.9 MHz 3.796 4.632 -0.836 inferred Autoconstr_clkgroup_0
==========================================================================================================================
Starting Points with Worst Slack
********************************
Starting Arrival
Instance Reference Type Pin Net Time Slack
Clock
------------------------------------------------------------------------------------------------------------------------------------------------------------------
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[0] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[0] 0.255 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[1] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[1] 0.255 -0.817
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[4] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[4] 0.255 -0.688
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[5] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[5] 0.255 -0.669
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[16] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[16] 0.255 -0.669
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[8] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[8] 0.255 -0.561
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[9] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[9] 0.255 -0.542
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[17] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[17] 0.255 -0.542
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[2] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[2] 0.255 -0.521
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[3] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[3] 0.255 -0.394
==================================================================================================================================================================
Ending Points with Worst Slack
******************************
Starting Required
Instance Reference Type Pin Net Time Slack
Clock
----------------------------------------------------------------------------------------------------------------------------------------------------------------
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[0] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[1] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[2] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[3] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[4] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[5] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[6] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[7] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[8] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[9] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
================================================================================================================================================================
修改后的代码：
==========================================================================================================================
assign TX_Baudrate_Clock_Stop=Transmite_Task_Finish & StopCHECK_Ack;
reg d1;
reg d2;
reg d3,d4,d5,d6,d7,d8,d9,d10;
reg Transmite_Task_Sign;
always @(posedge i_Clock or negedge i_Reset_n)
if(~i_Reset_n)begin
d1<=0;
d2<=0;
d3<=0;
d4<=0;
d5<=0;
d6<=0;
d7<=0;
d8<=0;
d9<=0;
d10<=0;
Transmite_Task_Sign<=0;
end
else begin
d1<=|NUM_SIGN_r[1:0];
d2<=|NUM_SIGN_r[5:3];
d3<=|NUM_SIGN_r[8:6];
d4<=|NUM_SIGN_r[11:9];
d5<=|NUM_SIGN_r[14:12];
d6<=|NUM_SIGN_r[17:15];
d7<=d1 | d2;
d8<=d3 | d4;
d9<=d5 | d6;
d10<=d7 | d8 | d9;
Transmite_Task_Sign<=~d10;
end
==========================================================================================================================
报告：
Worst slack in design: -0.601
Requested Estimated Requested Estimated Clock Clock
Starting Clock Frequency Frequency Period Period Slack Type Group
--------------------------------------------------------------------------------------------------------------------------
I2C_TEST|i_Clock 293.8 MHz 249.7 MHz 3.404 4.005 -0.601 inferred Autoconstr_clkgroup_0
==========================================================================================================================
Starting Points with Worst Slack
********************************
Starting Arrival
Instance Reference Type Pin Net Time Slack
Clock
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[8] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[8] 0.255 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[11] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[11] 0.255 -0.582
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[1] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[1] 0.255 -0.500
UART_Controller.Baudrate_Clock_Generator.RX_Clock_Div_Cnt[14] I2C_TEST|i_Clock cycloneii_lcell_ff regout RX_Clock_Div_Cnt[14] 0.255 -0.462
UART_Controller.Baudrate_Clock_Generator.TX_Clock_Div_Cnt[14] I2C_TEST|i_Clock cycloneii_lcell_ff regout TX_Clock_Div_Cnt[14] 0.255 -0.462
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[6] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[6] 0.255 -0.453
UART_Controller.Baudrate_Clock_Generator.RX_Clock_Div_Cnt[15] I2C_TEST|i_Clock cycloneii_lcell_ff regout RX_Clock_Div_Cnt[15] 0.255 -0.443
UART_Controller.Baudrate_Clock_Generator.RX_Clock_Div_Cnt_i[6] I2C_TEST|i_Clock cycloneii_lcell_ff regout RX_Clock_Div_Cnt_i_6 0.255 -0.443
UART_Controller.Baudrate_Clock_Generator.TX_Clock_Div_Cnt[15] I2C_TEST|i_Clock cycloneii_lcell_ff regout TX_Clock_Div_Cnt[15] 0.255 -0.443
UART_Controller.Baudrate_Clock_Generator.TX_Clock_Div_Cnt_i[6] I2C_TEST|i_Clock cycloneii_lcell_ff regout TX_Clock_Div_Cnt_i_6 0.255 -0.443
========================================================================================================================================================================
Ending Points with Worst Slack
******************************
Starting Required
Instance Reference Type Pin Net Time Slack
Clock
---------------------------------------------------------------------------------------------------------------------------------------------------------
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[0] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[1] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[2] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[3] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[4] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[5] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[6] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[7] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[8] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[9] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
=========================================================================================================================================================
以下面我写的为例子
还请高手指点拉
原代码：
==========================================================================================================================
assign Transmite_Task_Sign =~(|NUM_SIGN_r);
always @(posedge i_Clock or negedge i_Reset_n)
if(~i_Reset_n)
NUM_SIGN_r<=0;
else begin
case ({UART_WR_SWITCH,Transmite_OK_reg})
2'b10:NUM_SIGN_r<=NUM_SIGN;
2'b01:if(NUM_SIGN_r！==0)NUM_SIGN_r<=NUM_SIGN_r-1;
default:NUM_SIGN_r<=NUM_SIGN_r;
endcase
end
==========================================================================================================================
报告：
Worst slack in design: -0.836
Requested Estimated Requested Estimated Clock Clock
Starting Clock Frequency Frequency Period Period Slack Type Group
--------------------------------------------------------------------------------------------------------------------------
I2C_TEST|i_Clock 263.4 MHz 215.9 MHz 3.796 4.632 -0.836 inferred Autoconstr_clkgroup_0
==========================================================================================================================
Starting Points with Worst Slack
********************************
Starting Arrival
Instance Reference Type Pin Net Time Slack
Clock
------------------------------------------------------------------------------------------------------------------------------------------------------------------
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[0] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[0] 0.255 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[1] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[1] 0.255 -0.817
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[4] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[4] 0.255 -0.688
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[5] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[5] 0.255 -0.669
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[16] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[16] 0.255 -0.669
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[8] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[8] 0.255 -0.561
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[9] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[9] 0.255 -0.542
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[17] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[17] 0.255 -0.542
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[2] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[2] 0.255 -0.521
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[3] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[3] 0.255 -0.394
==================================================================================================================================================================
Ending Points with Worst Slack
******************************
Starting Required
Instance Reference Type Pin Net Time Slack
Clock
----------------------------------------------------------------------------------------------------------------------------------------------------------------
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[0] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[1] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[2] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[3] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[4] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[5] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[6] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[7] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[8] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[9] I2C_TEST|i_Clock cycloneii_lcell_ff ena NUM_SIGN_rlde_0 3.133 -0.836
================================================================================================================================================================
修改后的代码：
==========================================================================================================================
assign TX_Baudrate_Clock_Stop=Transmite_Task_Finish & StopCHECK_Ack;
reg d1;
reg d2;
reg d3,d4,d5,d6,d7,d8,d9,d10;
reg Transmite_Task_Sign;
always @(posedge i_Clock or negedge i_Reset_n)
if(~i_Reset_n)begin
d1<=0;
d2<=0;
d3<=0;
d4<=0;
d5<=0;
d6<=0;
d7<=0;
d8<=0;
d9<=0;
d10<=0;
Transmite_Task_Sign<=0;
end
else begin
d1<=|NUM_SIGN_r[1:0];
d2<=|NUM_SIGN_r[5:3];
d3<=|NUM_SIGN_r[8:6];
d4<=|NUM_SIGN_r[11:9];
d5<=|NUM_SIGN_r[14:12];
d6<=|NUM_SIGN_r[17:15];
d7<=d1 | d2;
d8<=d3 | d4;
d9<=d5 | d6;
d10<=d7 | d8 | d9;
Transmite_Task_Sign<=~d10;
end
==========================================================================================================================
报告：
Worst slack in design: -0.601
Requested Estimated Requested Estimated Clock Clock
Starting Clock Frequency Frequency Period Period Slack Type Group
--------------------------------------------------------------------------------------------------------------------------
I2C_TEST|i_Clock 293.8 MHz 249.7 MHz 3.404 4.005 -0.601 inferred Autoconstr_clkgroup_0
==========================================================================================================================
Starting Points with Worst Slack
********************************
Starting Arrival
Instance Reference Type Pin Net Time Slack
Clock
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[8] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[8] 0.255 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[11] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[11] 0.255 -0.582
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[1] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[1] 0.255 -0.500
UART_Controller.Baudrate_Clock_Generator.RX_Clock_Div_Cnt[14] I2C_TEST|i_Clock cycloneii_lcell_ff regout RX_Clock_Div_Cnt[14] 0.255 -0.462
UART_Controller.Baudrate_Clock_Generator.TX_Clock_Div_Cnt[14] I2C_TEST|i_Clock cycloneii_lcell_ff regout TX_Clock_Div_Cnt[14] 0.255 -0.462
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[6] I2C_TEST|i_Clock cycloneii_lcell_ff regout NUM_SIGN_r[6] 0.255 -0.453
UART_Controller.Baudrate_Clock_Generator.RX_Clock_Div_Cnt[15] I2C_TEST|i_Clock cycloneii_lcell_ff regout RX_Clock_Div_Cnt[15] 0.255 -0.443
UART_Controller.Baudrate_Clock_Generator.RX_Clock_Div_Cnt_i[6] I2C_TEST|i_Clock cycloneii_lcell_ff regout RX_Clock_Div_Cnt_i_6 0.255 -0.443
UART_Controller.Baudrate_Clock_Generator.TX_Clock_Div_Cnt[15] I2C_TEST|i_Clock cycloneii_lcell_ff regout TX_Clock_Div_Cnt[15] 0.255 -0.443
UART_Controller.Baudrate_Clock_Generator.TX_Clock_Div_Cnt_i[6] I2C_TEST|i_Clock cycloneii_lcell_ff regout TX_Clock_Div_Cnt_i_6 0.255 -0.443
========================================================================================================================================================================
Ending Points with Worst Slack
******************************
Starting Required
Instance Reference Type Pin Net Time Slack
Clock
---------------------------------------------------------------------------------------------------------------------------------------------------------
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[0] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[1] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[2] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[3] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[4] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[5] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[6] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[7] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[8] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
UART_Controller.UART_Transmiter.Transmite_Data_CTR.NUM_SIGN_r[9] I2C_TEST|i_Clock cycloneii_lcell_ff ena N_1768_i 2.741 -0.601
=========================================================================================================================================================
看不懂哎，望高手指点下