How to reduce the frequency offset?

Usually you should adjust some reactive componnent in frequency determining part of circuitry.

Frequency offset of what ?

Due to loading effect of a device ? Or temperature effect or components' tolerance ? Process variations ? PA On/Off states ?

If you give me more specific info. , I can help you..

Regards..

In a PLL controlled sinthesyzer ?
Or where ?

Crystal Oscillator:
The frequency of a crystal oscillator is determined by the crystal parameters, load capacitance and implementation. The capacitors across the crystal should match the load capactiance, the parasitic should be taken into account whenever done. Wenzel Associates have a good library on these things.

LC oscillator:
Give information about the implementation that is giving the problem.

PLL:
Check the VCO implementation, reference oscillator frequency, steady loop output.

Hi,


Are you measuring frequency offset of DECT system? If yes, it is caused by VCO pulling problem. Pls ensure the PA and VCO can be isolated. You should pay more attention to the shielding and layout technique. RF decoupling is also important to solve this problem.

By the way, are using testing the system in conductive test?

eecly

If the PLL ,maybe it is the load of the VCO output no matching.