PLL design problem

I use ADF4112 from ADI
does it any problem for output frequency in RF when I change reference frequecy's phase noise or jitter .
hoe does this effected the output?

The output of a PLL tracks all aspects of the reference. Whatever the ratio of output to reference is the same ratio as the output drift compared to the reference drift and the same ratio as the change of reference phase.

All of the above are for change rates less than the PLL loop bandwidth. This means that below the loop bandwidth the phase noise is that of the reference multiplied and above the loop bandwidth the phase noise is that of the VCO.