Question about simulating the noise factor of LNA in Cadence
时间：04-11
整理：3721RD
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Hi,
I've some questions about a test-bench schematic of LNA.
In order to simulate the noise factor, a balun is composed at the input port. It adopts one PORT and two VCVSs(voltage-controlled voltage-source). The gain of VCVS is set to be 0.707. And it also takes away the input (source) resistance that is included in the original schematic. I've simulated the input wave. It turns out that the differential input signal to the LNA is 0.707 times the output signal of the PORT.
My question is, why the gain is 0.707? and why the source resistance is removed?
Does anyone know the answers?
I've some questions about a test-bench schematic of LNA.
In order to simulate the noise factor, a balun is composed at the input port. It adopts one PORT and two VCVSs(voltage-controlled voltage-source). The gain of VCVS is set to be 0.707. And it also takes away the input (source) resistance that is included in the original schematic. I've simulated the input wave. It turns out that the differential input signal to the LNA is 0.707 times the output signal of the PORT.
My question is, why the gain is 0.707? and why the source resistance is removed?
Does anyone know the answers?