Help on PLL

Hi everybody,

I need to know if it's possible to find a PLL which receives 74 MHz signal
and the output is ~4MHz so that the ratio is 74 MHz * 4096/74250 = 4.08 MHz.

Is it possible? does anyone knows such component?

Thanks,

I think that imposible. the fraction_N PLL can not do that. Maybe you can use DDS to do it.

Dual modulus PLL works always in this case..

Ntotal=( Main Divider-1) 2^n+(P+2^n)

P: Programmed values
Main Divider= Main divider Programmed values

So, it's always possible obtain rational values with dual mudlus or swallow controlled PLL

Are you familiar with such component? can you give me datasheet or part number for it?

Thanks,

http://www.fujitsu.com/downloads/MIC...ll/e421349.pdf

Look at that datasheet ( for instance, you may findyourself many.. ).
In this data sheet the formulae is defined as

fVCO = [(M x N) + A] x fOSC ? R (A < N)

Here,

fVCO : Output frequency of external voltage controlled oscillator (VCO)
N : Preset divide ratio of binary 12-bit programmable counter (5 to 4,095)
A : Preset divide ratio of binary 6-bit swallow counter (0 to 63)
fOSC : Output frequency of the reference frequency oscillator
R : Preset divide ratio of binary 14-bit programmable reference counter (5 to 16,383)
M : Preset modulus of dual modulus prescaler (64)

For example. Let your frequency to be synthesized is 74MHz and reference frequency ( at the same time channel spacing ) is 15kHz. If you programme R value as ( for instance ) 512, cyrstal frequency will be 7.68MHz.

R=7.68MHz/15kHz=512
( there will be many possibilities to use different cyristal values))

In that case comparison frequency will be 15kHz and Total division ratio will be
NT= 74MHz/15kHz=4933.333. But this will be exact value of 15kHz so VCO frequency should be 73.995 MHz.

So ,main task is to realize that value.

So, [(M x N) + A]=4933. Since M value is 64 that is constant,

So finally , by taking integer value of N ( 4933/64=77.07813 -->>77 )we find,

N=77
M=64
A=5

values.

I hope that's clear..