微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 微波和射频技术 > 天线设计和射频技术 > Fractional Synthesizer question

Fractional Synthesizer question

时间:04-10 整理:3721RD 点击:
Hi:
I want to design a synthesizer at 800MHz-1300MHz with 125KHz steps,I want to use ADF4153 a fractional synthesizer ,is it ok?and how to choose the loop bandwidth?I choose 50Khz,is it ok?what about designing with DDS?Thank you!

Yes the FRacN PLL is a good option. The PLL bandwidth should be set to smaller than 50kHz if at all possible to reduce spurs at the output. ADI has a free downloadable program to simulate operation with thier PLL. See: http://forms.analog.com/form_pages/r.../adisimpll.asp

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top