What's the best topology for Ku band PLL?
Thanks
is ur design is on the chip level or an integrated synthesizer ?
i think its integrated not chip level i am not designing IC . but can u explain more what do u mean by integrated or chip level
I mean that will u design ur PLL using ICs already exist in the market or u will design ur own IC ?
Your Phase noise at 10 kHz will be heavily dependent on the loop filter bandwidth that you choose. Ku Band is 12 to 18 GHz, which is pretty high. Multiplying the output frequency to get to 12 GHz in not the way to go, as the phase noise will degrade by ~ 6 dB per factor of 2 (Multiplying by 16 will cost you 24 dB of phase noise). Perhaps you could use an external divide stage after the VCO, before the prescaler, to get the RF frequency down to the range that an integrated PLL will accept.
Dave
Is there any VCO IC in the Ku band?
I think that National/Analog/Perigrine all go up to ~ 6 GHz or so. You might want to look at parts from Hittite, they may be able to put together a discrete solution. This is a challenging task, to be sure.
Dave
Hello Dave;
Do you mean that in Ku band engineers should design discrete PLL using transistors?
Well, Ku band is where MMIC stuff starts to happen, where everything in transmission line and on a ceramic substrate. I'd be tempted to design the VCO discretely on a substrate, and use a discrete prescaler to take the VCO output down to something that a Multi-modulus prescaler can accept. Id be even more interested in buying one off the shelf because of the amount of work it could take to build one.
Hittite (http://www.hittite.com/index.cfm) has some applicable parts, but they were simply the first to come to mind.
Dave
any VCO MMIC operate at 13.050 Ghz?cant fine at hittite
Look at http://microwave.sytes.net
unable to open the website is this address correct?
Hello;
Zeshan102 wrote:
But I opened the website.Copy the URL address in your explorer.
The way people have been doing it for decades is to have an oscillator at KU band, and a sampler driven by someting like a 100 MHz xtal oscillator, and close the loop on the sampler output.
Nowadays, you can get a higher xtal drive frequency, like maybe 250 MHz, to give you a little more tuning range before aliasing.
It is hard to beat this old school style of circuit, since the RF phase sampler has much lower inherent phase noise than a digital gate does.
Is there a significant difference in phase noise between these structures :
1) design a L-band PLL and the multiply it up to ku-band or
2) design a ku-band pll directly?
I think that the first one will be better in phase noise. Isn't it?
Please look at Dielectric PLL Osc.
www.miteq.com/micro/pdfs/d296.pdf
i have realize ku band pll using hittte vco HMC529LP5 by using its divide by 4 pin to lock pll chip ADF4153 at around 3 ghz.